Skip to content
Thomas.Roehl edited this page Nov 5, 2015 · 4 revisions

Architecture specific notes for AMD Kabini

Performance groups

The following performance groups are partly based on the report by AMD fellow Paul J. Drongowski: Basic Performance Measurements for AMD Athlon™ 64, AMD Opteron™ and AMD Phenom™ Processors.

AMD Kabini Performance groups

Events

The input file for the events on AMD Kabini can be found here.

Counters

Core-local counters

General-purpose counters

The AMD® Kabini microarchitecture provides 4 general-purpose counters consisting of a config and a counter register.

Counters
Counter name Event name
PMC0 *
PMC1 *
PMC2 *
PMC3 *
##### Available Options
Option Argument Description Comment
edgedetect N Set bit 18 in config register
kernel N Set bit 17 in config register
threshold 8 bit hex value Set bits 24-31 in config register The value for threshold can range between 0x0 and 0x3
invert N Set bit 23 in config register

Cache-wide counters

L2 general-purpose counters

The AMD® Kabini microarchitecture provides 4 general-purpose counters for measuring L2 cache events. They consist of a config and a counter register.

Counters
Counter name Event name
CPMC0 *
CPMC1 *
CPMC2 *
CPMC3 *
##### Available Options
Option Argument Description Comment
threshold 8 bit hex value Set bits 24-31 in config register The value for threshold can range between 0x0 and 0x3
invert N Set bit 23 in config register
tid 4 bit hex value Set bits 56-59 in config register If bit equals 0, the events of the thread are counted. See BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 16h Processors for details.
nid 4 bit hex value Set bits 48-51 in config register If bit equals 0, the events of the thread are counted. See BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 16h Processors for details.

Socket-wide counters

Northbridge general-purpose counters

The AMD® Kabini microarchitecture provides 4 general-purpose counters for the Northbridge consiting of a config and a counter register.

Counters
Counter name Event name
UPMC0 *
UPMC1 *
UPMC2 *
UPMC3 *
Clone this wiki locally