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Supporting changes for the WTF #186 PR #11

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@m4drat m4drat commented Oct 12, 2023

Supporting changes for the: 0vercl0k/wtf#186

m4drat and others added 9 commits May 25, 2023 13:48
- Added support for Bochs' disassemble module
- Added support for bxInstruction's dst/src functions
- Added APIs to resolve instruction operand's address
- CPU: set/get reg16/reg32
- Added APIs to resolve instruction's seg, and operation mode
- Exported a function, to get total number of GPRs
`c_unwind` has been stabilized in 1.71.0
Equivalent of cmake `RelWithDebInfo`
Add `release-with-debuginfo` Cargo profile
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Thank you so much for doing this! A few nits and questions, but overall it looks really good and I'd be happy to merge this.

@@ -628,6 +665,30 @@ impl Cpu {

// gp regs

pub unsafe fn get_reg64(&self, reg: GpRegs) -> u64 {
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nit: if this is exposed by the rust api it should be reg64()/set_reg64 to be consistent with the rest of the files in this function. get/set are used that the cabi layer

14 => GpRegs::R14,
15 => GpRegs::R15,
// @TODO: Should we panic here?
_ => panic!("Invalid GpRegs"),
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panic is fine, can you include the reg num in the panic msg though?

printf("const BX_IA_CMP_AXIw: u32 = %#x;\n", BX_IA_CMP_AXIw);
printf("const BX_IA_CMP_EwIw: u32 = %#x;\n", BX_IA_CMP_EwIw);
printf("const BX_IA_CMP_EwsIb: u32 = %#x;\n", BX_IA_CMP_EwsIb);
unsigned opcode_disasm_wrapper(bool is_32, bool is_64, bx_address cs_base,
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I haven't gone through the wtf pr, but why do we need to expose the bx disassembler?

// to resolve the address of the instruction. I could not find
// any other way to do this, so I'm just going to use it here.

// Soooo, yeah, this is a bit of a hack. We can't simply use
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Thanks for the comment here!


// void instr_dmp() {
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do you think there is any point in keeping this once this PR is merged? it's only use is a very hack-y version of a thing youre replacing right? if so, feel free to delete...

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3 participants