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feat: updating from newer svd2rust (#56)
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Co-authored-by: lucasbrendel <[email protected]>
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xmc-action-bot[bot] and lucasbrendel authored Sep 1, 2023
1 parent 4cb84c3 commit d391ff6
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30 changes: 20 additions & 10 deletions src/can.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,43 +26,53 @@ pub struct RegisterBlock {
#[doc = "0x1cc - Module Interrupt Trigger Register"]
pub mitr: MITR,
}
#[doc = "CLC (rw) register accessor: an alias for `Reg<CLC_SPEC>`"]
#[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`clc`]
module"]
pub type CLC = crate::Reg<clc::CLC_SPEC>;
#[doc = "CAN Clock Control Register"]
pub mod clc;
#[doc = "ID (r) register accessor: an alias for `Reg<ID_SPEC>`"]
#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`id`]
module"]
pub type ID = crate::Reg<id::ID_SPEC>;
#[doc = "Module Identification Register"]
pub mod id;
#[doc = "FDR (rw) register accessor: an alias for `Reg<FDR_SPEC>`"]
#[doc = "FDR (rw) register accessor: CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`fdr`]
module"]
pub type FDR = crate::Reg<fdr::FDR_SPEC>;
#[doc = "CAN Fractional Divider Register"]
pub mod fdr;
#[doc = "LIST (r) register accessor: an alias for `Reg<LIST_SPEC>`"]
#[doc = "LIST (r) register accessor: List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`list`]
module"]
pub type LIST = crate::Reg<list::LIST_SPEC>;
#[doc = "List Register"]
pub mod list;
#[doc = "MSPND (rw) register accessor: an alias for `Reg<MSPND_SPEC>`"]
#[doc = "MSPND (rw) register accessor: Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mspnd`]
module"]
pub type MSPND = crate::Reg<mspnd::MSPND_SPEC>;
#[doc = "Message Pending Register"]
pub mod mspnd;
#[doc = "MSID (r) register accessor: an alias for `Reg<MSID_SPEC>`"]
#[doc = "MSID (r) register accessor: Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`msid`]
module"]
pub type MSID = crate::Reg<msid::MSID_SPEC>;
#[doc = "Message Index Register"]
pub mod msid;
#[doc = "MSIMASK (rw) register accessor: an alias for `Reg<MSIMASK_SPEC>`"]
#[doc = "MSIMASK (rw) register accessor: Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`msimask`]
module"]
pub type MSIMASK = crate::Reg<msimask::MSIMASK_SPEC>;
#[doc = "Message Index Mask Register"]
pub mod msimask;
#[doc = "PANCTR (rw) register accessor: an alias for `Reg<PANCTR_SPEC>`"]
#[doc = "PANCTR (rw) register accessor: Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`panctr`]
module"]
pub type PANCTR = crate::Reg<panctr::PANCTR_SPEC>;
#[doc = "Panel Control Register"]
pub mod panctr;
#[doc = "MCR (rw) register accessor: an alias for `Reg<MCR_SPEC>`"]
#[doc = "MCR (rw) register accessor: Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mcr`]
module"]
pub type MCR = crate::Reg<mcr::MCR_SPEC>;
#[doc = "Module Control Register"]
pub mod mcr;
#[doc = "MITR (w) register accessor: an alias for `Reg<MITR_SPEC>`"]
#[doc = "MITR (w) register accessor: Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mitr`]
module"]
pub type MITR = crate::Reg<mitr::MITR_SPEC>;
#[doc = "Module Interrupt Trigger Register"]
pub mod mitr;
57 changes: 11 additions & 46 deletions src/can/clc.rs
Original file line number Diff line number Diff line change
@@ -1,49 +1,17 @@
#[doc = "Register `CLC` reader"]
pub struct R(crate::R<CLC_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CLC_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CLC_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CLC_SPEC>) -> Self {
R(reader)
}
}
pub type R = crate::R<CLC_SPEC>;
#[doc = "Register `CLC` writer"]
pub struct W(crate::W<CLC_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CLC_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CLC_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CLC_SPEC>) -> Self {
W(writer)
}
}
pub type W = crate::W<CLC_SPEC>;
#[doc = "Field `DISR` reader - Module Disable Request Bit"]
pub type DISR_R = crate::BitReader;
#[doc = "Field `DISR` writer - Module Disable Request Bit"]
pub type DISR_W<'a, const O: u8> = crate::BitWriter<'a, CLC_SPEC, O>;
pub type DISR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
#[doc = "Field `DISS` reader - Module Disable Status Bit"]
pub type DISS_R = crate::BitReader;
#[doc = "Field `EDIS` reader - Sleep Mode Enable Control"]
pub type EDIS_R = crate::BitReader;
#[doc = "Field `EDIS` writer - Sleep Mode Enable Control"]
pub type EDIS_W<'a, const O: u8> = crate::BitWriter<'a, CLC_SPEC, O>;
pub type EDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
impl R {
#[doc = "Bit 0 - Module Disable Request Bit"]
#[inline(always)]
Expand All @@ -65,34 +33,31 @@ impl W {
#[doc = "Bit 0 - Module Disable Request Bit"]
#[inline(always)]
#[must_use]
pub fn disr(&mut self) -> DISR_W<0> {
pub fn disr(&mut self) -> DISR_W<CLC_SPEC, 0> {
DISR_W::new(self)
}
#[doc = "Bit 3 - Sleep Mode Enable Control"]
#[inline(always)]
#[must_use]
pub fn edis(&mut self) -> EDIS_W<3> {
pub fn edis(&mut self) -> EDIS_W<CLC_SPEC, 3> {
EDIS_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self.bits = bits;
self
}
}
#[doc = "CAN Clock Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clc](index.html) module"]
#[doc = "CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct CLC_SPEC;
impl crate::RegisterSpec for CLC_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [clc::R](R) reader structure"]
impl crate::Readable for CLC_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [clc::W](W) writer structure"]
#[doc = "`read()` method returns [`clc::R`](R) reader structure"]
impl crate::Readable for CLC_SPEC {}
#[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"]
impl crate::Writable for CLC_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
Expand Down
57 changes: 11 additions & 46 deletions src/can/fdr.rs
Original file line number Diff line number Diff line change
@@ -1,47 +1,15 @@
#[doc = "Register `FDR` reader"]
pub struct R(crate::R<FDR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<FDR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<FDR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<FDR_SPEC>) -> Self {
R(reader)
}
}
pub type R = crate::R<FDR_SPEC>;
#[doc = "Register `FDR` writer"]
pub struct W(crate::W<FDR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<FDR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<FDR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<FDR_SPEC>) -> Self {
W(writer)
}
}
pub type W = crate::W<FDR_SPEC>;
#[doc = "Field `STEP` reader - Step Value"]
pub type STEP_R = crate::FieldReader<u16>;
#[doc = "Field `STEP` writer - Step Value"]
pub type STEP_W<'a, const O: u8> = crate::FieldWriter<'a, FDR_SPEC, 10, O, u16>;
pub type STEP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>;
#[doc = "Field `DM` reader - Divider Mode"]
pub type DM_R = crate::FieldReader;
#[doc = "Field `DM` writer - Divider Mode"]
pub type DM_W<'a, const O: u8> = crate::FieldWriter<'a, FDR_SPEC, 2, O>;
pub type DM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>;
impl R {
#[doc = "Bits 0:9 - Step Value"]
#[inline(always)]
Expand All @@ -58,34 +26,31 @@ impl W {
#[doc = "Bits 0:9 - Step Value"]
#[inline(always)]
#[must_use]
pub fn step(&mut self) -> STEP_W<0> {
pub fn step(&mut self) -> STEP_W<FDR_SPEC, 0> {
STEP_W::new(self)
}
#[doc = "Bits 14:15 - Divider Mode"]
#[inline(always)]
#[must_use]
pub fn dm(&mut self) -> DM_W<14> {
pub fn dm(&mut self) -> DM_W<FDR_SPEC, 14> {
DM_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self.bits = bits;
self
}
}
#[doc = "CAN Fractional Divider Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fdr](index.html) module"]
#[doc = "CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct FDR_SPEC;
impl crate::RegisterSpec for FDR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [fdr::R](R) reader structure"]
impl crate::Readable for FDR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [fdr::W](W) writer structure"]
#[doc = "`read()` method returns [`fdr::R`](R) reader structure"]
impl crate::Readable for FDR_SPEC {}
#[doc = "`write(|w| ..)` method takes [`fdr::W`](W) writer structure"]
impl crate::Writable for FDR_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
Expand Down
25 changes: 5 additions & 20 deletions src/can/id.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,5 @@
#[doc = "Register `ID` reader"]
pub struct R(crate::R<ID_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ID_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ID_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ID_SPEC>) -> Self {
R(reader)
}
}
pub type R = crate::R<ID_SPEC>;
#[doc = "Field `MOD_REV` reader - Module Revision Number"]
pub type MOD_REV_R = crate::FieldReader;
#[doc = "Field `MOD_TYPE` reader - Module Type"]
Expand Down Expand Up @@ -42,7 +29,7 @@ impl MOD_TYPE_R {
_ => None,
}
}
#[doc = "Checks if the value of the field is `VALUE1`"]
#[doc = "Define the module as a 32-bit module."]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == MOD_TYPE_A::VALUE1
Expand All @@ -67,15 +54,13 @@ impl R {
MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16)
}
}
#[doc = "Module Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id](index.html) module"]
#[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct ID_SPEC;
impl crate::RegisterSpec for ID_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [id::R](R) reader structure"]
impl crate::Readable for ID_SPEC {
type Reader = R;
}
#[doc = "`read()` method returns [`id::R`](R) reader structure"]
impl crate::Readable for ID_SPEC {}
#[doc = "`reset()` method sets ID to value 0x00b5_c000"]
impl crate::Resettable for ID_SPEC {
const RESET_VALUE: Self::Ux = 0x00b5_c000;
Expand Down
27 changes: 6 additions & 21 deletions src/can/list.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,5 @@
#[doc = "Register `LIST[%s]` reader"]
pub struct R(crate::R<LIST_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<LIST_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<LIST_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<LIST_SPEC>) -> Self {
R(reader)
}
}
pub type R = crate::R<LIST_SPEC>;
#[doc = "Field `BEGIN` reader - List Begin"]
pub type BEGIN_R = crate::FieldReader;
#[doc = "Field `END` reader - List End"]
Expand Down Expand Up @@ -44,12 +31,12 @@ impl EMPTY_R {
true => EMPTY_A::VALUE2,
}
}
#[doc = "Checks if the value of the field is `VALUE1`"]
#[doc = "At least one message object is allocated to list i."]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == EMPTY_A::VALUE1
}
#[doc = "Checks if the value of the field is `VALUE2`"]
#[doc = "No message object is allocated to the list i. List i is empty."]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == EMPTY_A::VALUE2
Expand Down Expand Up @@ -77,15 +64,13 @@ impl R {
EMPTY_R::new(((self.bits >> 24) & 1) != 0)
}
}
#[doc = "List Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [list](index.html) module"]
#[doc = "List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct LIST_SPEC;
impl crate::RegisterSpec for LIST_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [list::R](R) reader structure"]
impl crate::Readable for LIST_SPEC {
type Reader = R;
}
#[doc = "`read()` method returns [`list::R`](R) reader structure"]
impl crate::Readable for LIST_SPEC {}
#[doc = "`reset()` method sets LIST[%s]
to value 0"]
impl crate::Resettable for LIST_SPEC {
Expand Down
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