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Verilog HDL Projects

ASIC Projects

1. FPGA Air Conditioner Controller link

  • An Air Conditioner Controller Module which displays the room temperature read from the temperature sensor and determines if Air Conditioner or Heater needs to be turned on.

2. RISC V Architecture using verilog link

  • Designed a working 32 Bit RISC-V Architecture with the key components such as Program Counter, Instruction Memory, Arithmetic Logic Unit, SRAM, Data Memory, Control unit.

3. Booth's Multiplier Algorithm link

  • High Speed Booth's Multiplier that multiplies two 4 bit numbers and gives an 8 bit output. This multiplier can multiply signed and unsigned numbers in 2s complement format.

Hobby Projects

3. Full Adder, Ripple Carry Adder, Subtractor link

  • An n-Bit Full Adder, Ripple Carry Adder and Subtractor created by cascading half adders with synchronous and asynchronous outputs.

4. Up-Down Counter with 7 Segment Display link

  • An Up-Down Counter with a clock divider module which can reduce the frequency of FPGA clock to 1Hz connected to a Common Anode 7-Segment Display on the development board.

5. 16-Bit Pseudo Random Number Generator link

  • Pseudo Random Number Generator with configurable number of Taps and a maximum period of 2^n^ - 1, where n is number of bits i.e. 16. A PRNG with LFSR is used in casual applications such as Games, temporary verification techniques, etc.

6. Hamming (7,4) link

  • World's First Error correcting code which can encode 4 bits of data using 3 parity bits and a decoder which has the ability to detect the bit position where the bit flip has happened.

Work in Progress

6. Communication Protocols in Verilog (In Progress)

  • Various Communication Protocols Implementation using Verilog which includes SPI, I2C, PCIe, Ethernet, UART, etc.

7. Finite State Machine for Trading (In Progress)

  • Stock Trading project which can buy, sell, hold stocks based on the inputs given by the user, implemented with Finite State Machine design with low latency.

8. Linear Regression using FPGAs (In Progress)

  • Implementing Linear regression in FPGA Development