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[nrf fromlist] drivers: pwm: nrfx: adjust PWM driver to fast PWM120 #2209

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merged 2 commits into from
Nov 7, 2024
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[nrf fromlist] drivers: pwm: nrfx: adjust PWM driver to fast PWM120 #2209

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e4cd2f3
[nrf fromlist] dts: common: nordic: Add clock property for fast PWM120
mstasiaknordic Nov 4, 2024
fcd13aa
[nrf fromlist] drivers: pwm: nrfx: adjust PWM driver to fast PWM120
mstasiaknordic Nov 4, 2024
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32 changes: 26 additions & 6 deletions drivers/pwm/pwm_nrfx.c
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Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,8 @@
#include <hal/nrf_gpio.h>
#include <stdbool.h>
#include <zephyr/linker/devicetree_regions.h>
#include <zephyr/cache.h>
#include <zephyr/mem_mgmt/mem_attr.h>

#include <zephyr/logging/log.h>

Expand Down Expand Up @@ -40,6 +42,10 @@
nrfx_pwm_config_t initial_config;
nrf_pwm_sequence_t seq;
const struct pinctrl_dev_config *pcfg;
uint32_t clock_freq;
#ifdef CONFIG_DCACHE
uint32_t mem_attr;
#endif
};

struct pwm_nrfx_data {
Expand Down Expand Up @@ -176,6 +182,12 @@

seq_values_ptr_get(dev)[channel] = PWM_NRFX_CH_VALUE(compare_value, inverted);

#ifdef CONFIG_DCACHE
if (config->mem_attr & DT_MEM_CACHEABLE) {
sys_cache_data_flush_range(seq_values_ptr_get(dev), config->seq.length);
}
#endif

LOG_DBG("channel %u, pulse %u, period %u, prescaler: %u.",
channel, pulse_cycles, period_cycles, data->prescaler);

Expand Down Expand Up @@ -243,11 +255,9 @@
static int pwm_nrfx_get_cycles_per_sec(const struct device *dev, uint32_t channel,
uint64_t *cycles)
{
/* TODO: Since this function might be removed, we will always return
* 16MHz from this function and handle the conversion with prescaler,
* etc, in the pin set function. See issue #6958.
*/
*cycles = 16ul * 1000ul * 1000ul;
const struct pwm_nrfx_config *config = dev->config;

*cycles = config->clock_freq;

return 0;
}
Expand Down Expand Up @@ -333,13 +343,18 @@
#define PWM(dev_idx) DT_NODELABEL(pwm##dev_idx)
#define PWM_PROP(dev_idx, prop) DT_PROP(PWM(dev_idx), prop)
#define PWM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(PWM(idx), prop)
#define PWM_MEM_REGION(idx) DT_PHANDLE(PWM(idx), memory_regions)

#define PWM_MEMORY_SECTION(idx) \
COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \
(__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \
DT_PHANDLE(PWM(idx), memory_regions)))))), \
PWM_MEM_REGION(idx)))))), \
())

#define PWM_GET_MEM_ATTR(idx) \
COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \
(DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0))

#define PWM_NRFX_DEVICE(idx) \
NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx)); \
static struct pwm_nrfx_data pwm_nrfx_##idx##_data; \
Expand All @@ -362,6 +377,11 @@
.seq.values.p_raw = pwm_##idx##_seq_values, \
.seq.length = NRF_PWM_CHANNEL_COUNT, \
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(PWM(idx)), \
.clock_freq = COND_CODE_1(DT_CLOCKS_HAS_IDX(PWM(idx), 0), \
(DT_PROP(DT_CLOCKS_CTLR(PWM(idx)), clock_frequency)), \
(16ul * 1000ul * 1000ul)), \
IF_ENABLED(CONFIG_DCACHE, \
(.mem_attr = PWM_GET_MEM_ATTR(idx),)) \
}; \
static int pwm_nrfx_init##idx(const struct device *dev) \
{ \
Expand All @@ -376,7 +396,7 @@
&pwm_nrfx_##idx##_config, \
POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \
&pwm_nrfx_drv_api_funcs)

Check notice on line 399 in drivers/pwm/pwm_nrfx.c

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drivers/pwm/pwm_nrfx.c:399 
-#define PWM_MEMORY_SECTION(idx)						      \
-	COND_CODE_1(PWM_HAS_PROP(idx, memory_regions),			      \
-		(__attribute__((__section__(LINKER_DT_NODE_REGION_NAME(	      \
-			PWM_MEM_REGION(idx)))))),			      \
+#define PWM_MEMORY_SECTION(idx)                                                                    \
+	COND_CODE_1(                                                                               \
+		PWM_HAS_PROP(idx, memory_regions),                                                 \
+		(__attribute__((__section__(LINKER_DT_NODE_REGION_NAME(PWM_MEM_REGION(idx)))))),   \
 		())
 
-#define PWM_GET_MEM_ATTR(idx)						      \
-	COND_CODE_1(PWM_HAS_PROP(idx, memory_regions),			      \
-		(DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0))
-
-#define PWM_NRFX_DEVICE(idx)						      \
-	NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx));			      \
-	static struct pwm_nrfx_data pwm_nrfx_##idx##_data;		      \
-	static uint16_t pwm_##idx##_seq_values[NRF_PWM_CHANNEL_COUNT]	      \
-			PWM_MEMORY_SECTION(idx);			      \
-	PINCTRL_DT_DEFINE(PWM(idx));					      \
-	static const struct pwm_nrfx_config pwm_nrfx_##idx##_config = {	      \
-		.pwm = NRFX_PWM_INSTANCE(idx),				      \
-		.initial_config = {					      \
-			.skip_gpio_cfg = true,				      \
-			.skip_psel_cfg = true,				      \
-			.base_clock = NRF_PWM_CLK_1MHz,			      \
-			.count_mode = (PWM_PROP(idx, center_aligned)	      \
-				       ? NRF_PWM_MODE_UP_AND_DOWN	      \
-				       : NRF_PWM_MODE_UP),		      \
-			.top_value = 1000,				      \
-			.load_mode = NRF_PWM_LOAD_INDIVIDUAL,		      \
-			.step_mode = NRF_PWM_STEP_TRIGGERED,		      \
-		},							      \
-		.seq.values.p_raw = pwm_##idx##_seq_values,		      \
-		.seq.length = NRF_PWM_CHANNEL_COUNT,			      \
-		.pcfg = PINCTRL_DT_DEV_CONFIG_GET(PWM(idx)),		      \
-		.clock_freq = COND_CODE_1(DT_CLOCKS_HAS_IDX(PWM(idx), 0),     \
-			(DT_PROP(DT_CLOCKS_CTLR(PWM(idx)), clock_frequency)), \
-			(16ul * 1000ul * 1000ul)),			      \
-		IF_ENABLED(CONFIG_DCACHE,				      \
-			(.mem_attr = PWM_GET_MEM_ATTR(idx),))		      \
-	};								      \
-	static int pwm_nrfx_init##idx(const struct device *dev)		      \
-	{								      \
-		IRQ_CONNECT(DT_IRQN(PWM(idx)), DT_IRQ(PWM(idx), priority),    \
-			    nrfx_isr, nrfx_pwm_##idx##_irq_handler, 0);	      \
-		return pwm_nrfx_init(dev);				      \
-	};								      \
-	PM_DEVICE_DT_DEFINE(PWM(idx), pwm_nrfx_pm_action);		      \
-	DEVICE_DT_DEFINE(PWM(idx),					      \
-			 pwm_nrfx_init##idx, PM_DEVICE_DT_GET(PWM(idx)),      \
-			 &pwm_nrfx_##idx##_data,			      \
-			 &pwm_nrfx_##idx##_config,			      \
-			 POST_KERNEL, CONFIG_PWM_INIT_PRIORITY,		      \
-			 &pwm_nrfx_drv_api_funcs)
+#define PWM_GET_MEM_ATTR(idx)                                                                      \
+	COND_CODE_1(PWM_HAS_PROP(idx, memory_regions),                                             \
+		    (DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0))
+
+#define PWM_NRFX_DEVICE(idx)                                                                       \
+	NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx));                                             \
+	static struct pwm_nrfx_data pwm_nrfx_##idx##_data;                                         \
+	static uint16_t pwm_##idx##_seq_values[NRF_PWM_CHANNEL_COUNT] PWM_MEMORY_SECTION(idx);     \
+	PINCTRL_DT_DEFINE(PWM(idx));                                                               \
+	static const struct pwm_nrfx_config pwm_nrfx_##idx##_config = {                            \
+		.pwm = NRFX_PWM_INSTANCE(idx),                                                     \
+		.initial_config =                                                                  \
+			{                                                                          \
+				.skip_gpio_cfg = true,                                             \
+				.skip_psel_cfg = true,                                             \
+				.base_clock = NRF_PWM_CLK_1MHz,                                    \
+				.count_mode =
#define COND_PWM_NRFX_DEVICE(unused, prefix, i, _) \
IF_ENABLED(CONFIG_HAS_HW_NRF_PWM##prefix##i, (PWM_NRFX_DEVICE(prefix##i);))

Expand Down
1 change: 1 addition & 0 deletions dts/common/nordic/nrf54h20.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -639,6 +639,7 @@
reg = <0x8e4000 0x1000>;
status = "disabled";
interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>;
clocks = <&hsfll120>;
power-domains = <&gpd NRF_GPD_FAST_ACTIVE1>;
#pwm-cells = <3>;
};
Expand Down
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