AMBA_AHB_lite

Study Room for AHB_lite Project

Design Rule

• 50 mHz CLOCK FREQ

• All FF works at POSEDGE CLK

• All FF has NEGEDGE RESET

• No Locked-Transfer

• No BURST MODE (HTRANS --> IDLE / NONSEQ)

• No Error Response (HRESP --> 0)

Role

1. Master Design

namu00

2. Slave Design

verilogHDL
Kelvinlee501