- ⭐ A Graduate FPGA Developer at Optiver
- ✨ Graduated from SJTU with a master's degree in Intergrated Circuit Engineering
- 🔭 Interested in Digital IC Design/Verification and FPGA Heterogeneous Computing
- 🌱 Focus on CPU-FPGA Co-design to accelerate domain specific algorithm including Machine Learning, Bioinformatics and High Frequency Trading
- 📫 Connect with Me: [email protected]
- : A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM
- : Accelerate MobileNetV2-SSD on Intel CPU and Neural Compute Stick2 based on OpenVINO
- : Calculate depth of field using different cost functions(SAD/NCC/SHD) based on MATLAB
- Working at Optiver as Graduate FPGA Developer
- Learning Computer Architecture and Computer Network
- Learning IC Design and Verification
- Learning Software Knowledge and Tarding Knowledge
- ......