more changes

Makefile.target

@@ -356,8 +356,12 @@ obj-arm-y += syborg.o syborg_fb.o syborg_interrupt.o syborg_keyboard.o
 obj-arm-y += syborg_serial.o syborg_timer.o syborg_pointer.o syborg_rtc.o
 obj-arm-y += syborg_virtio.o
 obj-arm-y += vexpress.o
-obj-arm-y += s5l8900.o iphone2g.o pcf50633.o s5l8900_uart.o s5l8900_spi.o pl192.o
-obj-arm-y += s5l8900_i2c.o usb_synopsys.o
+#obj-arm-y += s5l8900.o iphone2g.o pcf50633.o s5l8900_uart.o s5l8900_spi.o pl192.o
+#disable 2g support
+obj-arm-y += s5l8900_i2c.o usb_synopsys.o pcf50633.o s5l8900_uart.o s5l8900_spi.o pl192.o
+obj-arm-y += s5l8930.o s5l8930_i2c.o s5l8930_i2cchg.o s5l8930_spi.o s5l8930_iop.o
+obj-arm-y += pflash_spi.o s5l8930_h2fmi.o
+obj-arm-y += ipad1g.o
 
 #ifdef CONFIG_SKINNING
 VPATH+=:$(SRC_PATH)/skin

README.txt

@@ -5,7 +5,7 @@ make
 
 How to run:
 
-./arm-softmmu/qemu-system-arm -M iphone2g -option-rom iBoot-1.0.2.m68ap.RELEASE -option-rom iphone1-bootrom.bin -pflash nordump.bin -serial stdio -skin ./skin/devices/iphone2g/skin.xml
+./arm-softmmu/qemu-system-arm -M ipad1g -option-rom iBoot.k48ap.RELEASE.unencrypted -global s5l8930_h2fmi0.file="0,ce0.bin;2,ce2.bin" -global s5l8930_h2fmi1.file="0,ce1.bin;2,ce3.bin" -pflash ipadnor.bin -gdb tcp::6666 -nographic -S -serial file:serial.txt -monitor stdio -smp 2
 
 How do i contribute:
 

block.c

@@ -905,6 +905,7 @@ static int bdrv_check_byte_request(BlockDriverState *bs, int64_t offset,
     if (offset < 0)
         return -EIO;
 
+	//fprintf(stderr, "%s: offset %llx len %llx size %x\n", __FUNCTION__, offset, len, size);
     if ((offset > len) || (len - offset < size))
         return -EIO;
 

exec.c

@@ -2196,7 +2196,13 @@ void tlb_set_page(CPUState *env, target_ulong vaddr,
     CPUWatchpoint *wp;
     target_phys_addr_t iotlb;
 
-    assert(size >= TARGET_PAGE_SIZE);
+#if defined(DEBUG_TLB)
+    fprintf(stderr, "tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx
+           " prot=%x idx=%d size=0x%08x target_page_size 0x%x\n",
+           vaddr, paddr, prot, mmu_idx, size, TARGET_PAGE_SIZE);
+#endif
+
+    //assert(size >= TARGET_PAGE_SIZE);
     if (size != TARGET_PAGE_SIZE) {
         tlb_add_large_page(env, vaddr, size);
     }
@@ -2206,10 +2212,10 @@ void tlb_set_page(CPUState *env, target_ulong vaddr,
     } else {
         pd = p->phys_offset;
     }
-#if defined(DEBUG_TLB)
-    printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx
-           " prot=%x idx=%d pd=0x%08lx\n",
-           vaddr, paddr, prot, mmu_idx, pd);
+#if 0
+    fprintf(stderr, "tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x" TARGET_FMT_plx
+           " prot=%x idx=%d pd=0x%08lx size=0x%08lx\n",
+           vaddr, paddr, prot, mmu_idx, pd, size);
 #endif
 
     address = vaddr;
@@ -4343,6 +4349,11 @@ void cpu_io_recompile(CPUState *env, void *retaddr)
 
 #if !defined(CONFIG_USER_ONLY)
 
+CPUState *get_current_cpu(void)
+{
+	return cpu_single_env;
+}
+
 void dump_exec_info(FILE *f, fprintf_function cpu_fprintf)
 {
     int i, target_code_size, max_target_code_size;

hw/flash.h

@@ -1,6 +1,16 @@
 /* NOR flash devices */
 typedef struct pflash_t pflash_t;
 
+void pflash_set_rxlen(void *opaque, uint32_t rxLen);
+void pflash_cmd_set(void *opaque, uint32_t *cmd);
+uint32_t pflash_cmd_len(void *opaque);
+uint32_t pflash_cmd_parse(void *opaque);
+pflash_t *pflash_spi_register(  ram_addr_t off,
+                                BlockDriverState *bs, uint32_t sector_len,
+                                int nb_blocs, int nb_mappings, int width,
+                                uint16_t id0, uint16_t id1, uint16_t id2);
+
+
 /* pflash_cfi01.c */
 pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
                                 BlockDriverState *bs,
@@ -19,10 +29,11 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
 
 /* nand.c */
 typedef struct NANDFlashState NANDFlashState;
-NANDFlashState *nand_init(int manf_id, int chip_id);
-void nand_done(NANDFlashState *s);
+uint32_t nand_read(NANDFlashState *s, uint32_t ce, uint32_t offset, uint32_t size, uint32_t *res);
 void nand_setpins(NANDFlashState *s,
                 int cle, int ale, int ce, int wp, int gnd);
+NANDFlashState *nand_init(int manf_id, int chip_id);
+void nand_done(NANDFlashState *s);
 void nand_getpins(NANDFlashState *s, int *rb);
 void nand_setio(NANDFlashState *s, uint8_t value);
 uint8_t nand_getio(NANDFlashState *s);

hw/i2c.c

@@ -84,6 +84,9 @@ int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv)
     DeviceState *qdev;
     i2c_slave *slave = NULL;
 
+    if(address & 1)
+        address &= ~1;
+
     QLIST_FOREACH(qdev, &bus->qbus.children, sibling) {
         i2c_slave *candidate = I2C_SLAVE_FROM_QDEV(qdev);
         if (candidate->address == address) {

hw/irq.c

@@ -30,11 +30,17 @@ struct IRQState {
     int n;
 };
 
+void print_irq(qemu_irq irq)
+{
+	fprintf(stderr, "IRQ: %x\n", irq->n);
+}
+
 void qemu_set_irq(qemu_irq irq, int level)
 {
     if (!irq)
         return;
 
+	//fprintf(stderr, "%s: calling handler for irq %x level %d\n", __FUNCTION__, irq->n, level);
     irq->handler(irq->opaque, irq->n, level);
 }