Add SV, Includes, and Wildcard Support

[fkwilken]

Needed the ability to do simulation with the caravel with system verilog based designs.
SV Designs are included using in includes.rtl.caravel_user_project with the following syntax:
-sv -I $(USER_PROJECT_VERILOG)/rtl/peripherals $(USER_PROJECT_VERILOG)/rtl/peripherals/*.sv

With this PR, caravel-cocotb can now

• parse system verilog files (starting with -sv)
• expand wildcard (*) operator as needed when parsing
• include directories notated with -I flag for .svh and .vh files

[M0stafaRady]

Great update