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Added an example around VRAM usage #48
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This shall simplify understanding of the two data registers and how to work with them. I found out during my examples, that the ADRSEL have to be set first before setting the address. That might be a symptom of the Emulator, but I created weird effect if Setting ADRSEL last. Added a small piece of example code for better understanding.
VERA Programmer's Reference.md
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@@ -279,7 +279,7 @@ The video RAM (VRAM) isn't directly accessible on the CPU bus. VERA only exposes | |||
There are 2 data ports to the VRAM. Which can be accessed using DATA0 and DATA1. The address and increment associated with the data port is specified in ADDRx_L/ADDRx_M/ADDRx_H. These 3 registers are multiplexed using the ADDR_SEL in the CTRL register. When ADDR_SEL = 0, ADDRx_L/ADDRx_M/ADDRx_H become ADDR0_L/ADDR0_M/ADDR0_H. | |||
When ADDR_SEL = 1, ADDRx_L/ADDRx_M/ADDRx_H become ADDR1_L/ADDR1_M/ADDR1_H. | |||
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By setting the 'Address Increment' field in ADDRx_H, the address will be increment after each access to the data register. The increment register values and corresponding increment amounts are shown in the following table: | |||
By setting the 'Address Increment' field in ADDRx_H, the address will be increment after each access (read or write) to the data register. Both addresses are getting incremented individually hence on access of DATA0, ADDR0 getting incremented and ADDR1 is unchanged. The increment register values and corresponding increment amounts are shown in the following table: |
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Suggested rewording:
Both addresses are incremented individually. When DATA0 is accessed, ADDR0 is incremented and ADDR1 is unchanged.
VERA Programmer's Reference.md
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``` | ||
begin | ||
;load ADDR0 with $01000 and increment=1 | ||
LDA #$00 ;load ADDR_SEL for DATA0 |
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Since this field is shared with DCSEL, I would suggest the following approach in example code:
LDA $9F25 ;load the current value for CTRL
AND #$FE ;clear the ADDRSEL bit
STA $9F25
STA $9F22 | ||
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;load ADDR1 with $04000 and increment=1 | ||
LDA #$01 ;load ADDR_SEL for DATA1 |
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Similarly to above:
LDA $9F25 ;load the current value for CTRL
ORA #$1 ;set the ADDRSEL bit
STA $9F25
Actually, the 65C02 has the
Are you sure RMW instructions will work like this on the VERA registers? |
I agree TSB and TRB would be a better route for setting/clearing those bits. You can read the current byte at that register, at least in the emulator. For obvious reasons, internal team members are the only ones who would know whether this is hardware-accurate. The reason you would use a RMW instruction to change only the one bit is because DCSEL may have been set or reset somewhere else, and depend on the value. I guess I would argue that it's a "best practice" kind of thing, only modify the bits you intend to modify. |
Very good point. will update it accordingly with the TSB things. I thought myself if that would be nessesary. I simply did not care in my code as the DCSEL is not getting used (I am working on Layer0). But I agree, that is a missleading example. Thanks for the great input. |
Changed the code snipped for VIDEO RAM example to preserve the rest of the CTRL Register instead of overwriting it. It utilizes 65c02 functionality (TSB and TRB). Now more save to use.
Added wording and tables around bitmap organization in VRAM.
The "best practice" is always to set the control bit that you need just before you need it. Therefore, it won't matter what it was before. And, it won't matter what you do to the other bit (your code and VERA won't need it because that bit's registers won't be accessed at that time)! That means that you can use a very efficient The only times that those bits need to be preserved is during an interrupt handler that sets that register. But, that handler should preserve the entire register at the beginning, and restore it at the end. There's no need to waste space and time with bit-manipulation instructions on those control bits. |
LDX #$00 | ||
loop | ||
LDA $9F23 ;load byte from DATA0 and increment DATA0 | ||
STA $9F24 ;write byte to DATA1 and increment DATA1 |
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ADDR0
and ADDR1
are incremented.
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<table> | ||
<tr> |
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You should use Markdown's table syntax, not HTML's syntax.
This shall simplify understanding of the two data registers and how to work with them. I found out during my examples, that the ADRSEL have to be set first before setting the address. That might be a symptom of the Emulator, but I created weird effect if Setting ADRSEL last. Added a small piece of example code for better understanding.