Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Breaking Change: Don't add capstone dir to include search path #2178

Open
wants to merge 2,315 commits into
base: next
Choose a base branch
from

Conversation

autoantwort
Copy link

@autoantwort autoantwort commented Oct 20, 2023

Main motivation:
This is what the installed cmake config does:

capstone/CMakeLists.txt

Lines 628 to 630 in 5fb8a42

target_include_directories(capstone PUBLIC
$<BUILD_INTERFACE:${PROJECT_SOURCE_DIR}/include>
)

Also capstone has very generic header names that could collide with other projects:
image

#1982
wolfpld/tracy#547

- Refactor TriCore instructions
- Simplify operand encoding for better readability
- Refactor and optimize instruction encoding for TriCore architecture
- Improve performance and reduce code size by simplifying opcodes and encoding logic
- Update instruction definitions in TriCoreInstrInfo.td file
- Omit some large but non-essential changes in diff summary for readability
- Refactor architecture specific code for TriCore
- Update TriCore instruction information in [arch/TriCore/TriCoreInstrInfo.td]
- Improve performance and readability of relevant functions
- Add new instruction `MOVZ_A`, remove instruction `NOT`, and add several new multiply and multiply-subtract instructions
- Move `multiclass mISR_1` and `multiclass mISYS_0` to separate file and fix typo in `rfe` instruction in `mISYS_0`
- Add support for new CPU feature `TriCore_FEATURE_HasV162` and update relevant inc files.
- Refactor TriCore instruction info
- Improve code organization
- Optimize instruction handling
- Eliminate unnecessary code duplication
…nfo.td

- Add missing instructions and update existing ones
- Add support for new Tricore architectures
- Clean up redundant instructions definitions
- Modify architecture options for the TRICORE mode
- Update disallowed modes for Tricore architecture
- Add support for TRICORE architecture modes 110, 120, 130, 131, 160, 161, and 162 in test_corpus.py
- Change the TriCore mode from `CS_MODE_TRICORE` to `CS_MODE_TRICORE_162` in `Tricore/*.s.cs`
Rot127 and others added 28 commits July 24, 2023 02:52
[ARM] Handle system operands in way more detail.
* Fail CI if a command fails

* Apply cs_options in MC tests

* Emit a space if the alias has one at position I.

* Fix pop instruction tests.

* Update reglist patch and fix it again in ARMGenCSMappingInsnOps.inc

* Fix VSCCLRM* patch and write attributes.

* Emit new system operand formatting in tests

* Set new syntax in issues.cs

* Fix correct setting of neon lane

* Fix cstest arm SYSM operand type output

* Add implicit reads and writes of SP to POP and PUSH.

* Fix issue tests with new syntax and group names.

---------

Co-authored-by: Rot127 <[email protected]>
* Add venv to the gitignore so I can test Python code

* add test_iter.py which is nearly identical to test_lite.py

* add support for test_iter.py in check; also add missing test_lite.py

* Add support for the disasm_iter C function
This patch fixes Capstone 5 build on NixOS.

NixOS's build infrastructure sets CMAKE_INSTALL_{LIB,INCLUDE}DIR to
absolute paths. If you append it to ${prefix}, you get the wrong path.
NixOS automatically detects it and links this issue:
NixOS/nixpkgs#144170
* Disable swift binding const generate

* Fix no return value error in Apple Silicon
This has several consequences:

- Branch immediates are memory operands from now. Hence they are added manually as immediate.
- Some operands, handled over printOprerand(), are added to a mem operand, but the mem operand
  is never closed. There is simply no indication when a memory operand ends.
  So we close the mem operand now always, after an offset or disp awas added and the base exists.
@trufae
Copy link
Contributor

trufae commented Oct 22, 2023

that's a regression workarounded in r2 radareorg/radare2@ed90a90

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet