Update vhdl.json

fix snippets
VHDL-LS · Sep 16, 2024 · fc926bc · fc926bc
1 parent 9f97a55
commit fc926bc
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/snippets/vhdl.json b/snippets/vhdl.json
@@ -105,7 +105,7 @@
 			"component ${1:$TM_FILENAME_BASE} is",
 			"\tport (",
 			"\t\t${2:clk   : in std_logic;}",
-			"\t\t${3:reset : in std_logic;}",
+			"\t\t${3:reset : in std_logic}",
 			"\t\t$0",
 			"\t);",
 			"end component;"
@@ -210,7 +210,7 @@
 				"entity ${1:$TM_FILENAME_BASE} is",
 				"\tport (",
 				"\t\t${2:clk   : in std_logic;}",
-				"\t\t${3:reset : in std_logic;}",
+				"\t\t${3:reset : in std_logic}",
 				"\t\t$0",
 				"\t);",
 				"end entity;"
@@ -223,7 +223,7 @@
 				"entity ${1:$TM_FILENAME_BASE} is",
 				"\tport (",
 				"\t\t${2:clk   : in std_logic;}",
-				"\t\t${3:reset : in std_logic;}",
+				"\t\t${3:reset : in std_logic}",
 				"\t\t$0",
 				"\t);",
 				"end entity $1;",