#235 Implemented but still need helper classes.

Rich2 · Apr 11, 2023 · 93c9f30 · 93c9f30
1 parent 4a584c9
commit 93c9f30
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Showing 3 changed files with 39 additions and 2 deletions.
diff --git a/EGrid/src/eg320/Terr320E0.scala b/EGrid/src/eg320/Terr320E0.scala
@@ -43,7 +43,7 @@ object Terr320E0 extends Long320Terrs
  help.run
 
  corners.setCorner(130, 526, 0, HVLt)
- corners.setCornerPair(132, 524, 2, HVUR, HVLt)
+ corners.setCornerPair(132, 524, 2, HVRt, HVLt)
 }
 
 object BritReg

diff --git a/EGrid/src/egrid/EGridLongMan.scala b/EGrid/src/egrid/EGridLongMan.scala
@@ -376,7 +376,11 @@ final case class EGridLongMan(thisInd: Int, sys: EGridLongMulti) extends EGridMa
  case HVUL if vUp => Some(HCen(r + 1, ltGrid.rowRightCenC(r + 1)))
  case HVUL => Some(HVertHigh(r, ltGrid.rowRightCenC(r - 1)))
 
- //case HVRt Some( r, rtGrid.rowLeftCenC())
+ case HVRt if HVert.rcISHigh(r, c) => Some(HVertHigh(r, rtGrid.rowVertHighLeftC(r) + 4))
+ case HVRt => Some(HVertLow(r, rtGrid.rowVertLowLeftC(r) + 4))
+ case HVLt if HVert.rcISHigh(r, c) => Some(HVertHigh(r, rtGrid.rowVertHighRightC(r) - 4))
+ case HVLt => Some(HVertLow(r, rtGrid.rowVertLowRightC(r) - 4))
+
  case dirn => excep(s"$dirn")
  }
  }

diff --git a/Tiling/srcHex/HGrid.scala b/Tiling/srcHex/HGrid.scala
@@ -128,6 +128,39 @@ trait HGrid extends Any with TGrid with HGridSys
  case _ => true
  }
 
+ def rowVertHighLeftC(r: Int): Int = {
+ val rUp = r + 1
+ val rUpHC = rowLeftCenC(rUp)
+ val rDn = r - 1
+ val rDnHC = rowLeftCenC(rDn)
+ ife(rUp %% 4 == 0, (rUpHC - 2).min(rDnHC), rUpHC.min(rDnHC - 2))
+ }
+
+ def rowVertLowLeftC (r: Int): Int =
+ { val rUp = r + 1
+ val rUpHC = rowLeftCenC(rUp)
+ val rDn = r - 1
+ val rDnHC = rowLeftCenC(rDn)
+ ife(rUp %% 4 == 0, rUpHC.min(rDnHC - 2), (rUpHC - 2).min(rDnHC))
+ }
+
+ def rowVertHighRightC(r: Int): Int = {
+ val rUp = r + 1
+ val rUpHC = rowRightCenC(rUp)
+ val rDn = r - 1
+ val rDnHC = rowRightCenC(rDn)
+ ife(rUp %% 4 == 0, (rUpHC + 2).max(rDnHC), rUpHC.min(rDnHC + 2))
+ }
+
+ def rowVertLowRightC(r: Int): Int =
+ { val rUp = r + 1
+ val rUpHC = rowRightCenC(rUp)
+ val rDn = r - 1
+ val rDnHC = rowRightCenC(rDn)
+ ife(rUp %% 4 == 0, rUpHC.min(rDnHC + 2), (rUpHC + 2).min(rDnHC))
+ }
+
+
  override def hCenSteps(hCen: HCen): HStepArr = HStep.full.filter(st => hCenExists(hCen.r + st.tr, hCen.c + st.tc))
 
  override def unsafeStepEnd(startCen: HCen, step: HStep): HCen =