the current progress

[wwylele]

Core interpreter

basically done and most instructions are tested against hardware, done using test_generator and test_verifier. Instructions that were not automatically tested include

• flow control instructions (BR, CALL, RET, REP, BKREP...)
• stack push/pop
• CBS (due to hidden register state)
• (did I forget anything?)

Instructions that still doesn't pass all test:

• Step/Offset problem as documented here and here. The second one might be important as Pokemon XY is using that mode (not sure if hitting the buggy case tho) likely caused by a precious ar/arp context restore bug
• Some other "strange case" documented in the code. Probably not important

Peripherals

APBP (???)

Implemented according to 3dbrew/gbatek doc, and observation in DSP code. Not well tested. Working fine so far.

ICU (interrupt controller unit)

Implemented according to gbatek doc, and observation in DSP code. Not well tested. Working fine so far.

MIU (memory interface unit)

Implemented according to observation in DSP code and Lauterbach Teak debugger. Memory bank switching registers are hwtested. Others are not. Working fine so far.

AHBM (Advanced High-performance Bus Master?) + DMA (Direct memory access)

Implemented according to gbatek and observation in DSP code. Only CPU->DSP direction is implemented (kind-of), but another two directions (DSP->CPU and DSP->DSP) exist, it seems. Some unknown registers are doing important things but unclear. Need massive hwtest on this! Mostly implemented and verified against hardware. Some configure/status bits are still unknown.

BTDMP (buffered time-division multiplexing port? a.k.a audio output port)

Implemented according to gbatek and observation in DSP code. Never actually got real audio from emulation (almost always 00000000...), but messing with registers here indeed let real 3DS play noise. Got recognizable audio, but there are some noise. Fixed, working now

Timer

Implemented according to observation in DSP code and Lauterbach Teak debugger. Not hwtested counting frequency and counter registers are verified on hardware. Kind of work, but the usage from DSP code is strange (setting up a 1-second repeating timer and only constantly read the tick count from it?)