Dynamic Instrumentation Tool Platform
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Updated
May 31, 2024 - C
Dynamic Instrumentation Tool Platform
SST Architectural Simulation Components and Libraries
A C++11 simulator for a variety of CDN caching policies.
a high performance library for building cache simulators
cache analysis platform developed at Emory University and CMU
A cache simulator, using the C++ language, to simulate a direct-mapped, fully associative and set-associative cache. It has a set of memory reference generators to generate different sequences of references.
CSCI 564 Advanced Computer Architecture Project 1 Description and Starter Code
CSCI 564 Advanced Computer Architecture Project 2 Description and Starter Code
WPI CS2011 Assembly Assignments for B-term 2017
Haystack is an analytical cache model that given a program computes the number of cache misses.
A low-latency LRU approximation cache in C++ using CLOCK second-chance algorithm. Multi level cache too. Up to 2.5 billion lookups per second.
This cache simulator is used in order to simulate substitutions in cache using replacement policies (FIFO and LRU) and write back into the cache (using the write-allocate policy).
A graphics tracing and replay framework to explore system-level effects on heterogeneous CPU+GPU memory systems.
Source code for the evaluated benchmarks and proposed cache management technique, GRASP, in [Faldu et al., HPCA'20].
Simulates a memory-subsystem encompassing a bi-level TLB and a bi-level cache system along with a main memory following segmentation with paging with all different replacement policies
Cache Simulator for Computer Architecture course
🏜 Implementation of single-level cache simulator and analyze the performance of various cache architectures using real-world program traces.
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