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Phrase support for ARM #18

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tmr232 opened this issue Dec 19, 2015 · 1 comment
Open

Phrase support for ARM #18

tmr232 opened this issue Dec 19, 2015 · 1 comment

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@tmr232
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tmr232 commented Dec 19, 2015

The phrase update to Sark broke support for ARM instructions, as ARM phrases are not properly parsed, and raise an exception. This should be resolved ASAP. Even if only to avoid exceptions.

tmr232 added a commit that referenced this issue Dec 20, 2015
On the other hand - they are not handled.
This is a partial fix for #18.
@arizvisa
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arizvisa commented Jan 9, 2019

Hey @tmr232. I'm not sure if you nailed this yet, but for ARM phrases IDA handles these a lot easier compared to Intel.

For phrases (idaapi.o_phrase), IDA just stores them both as registers.
The <Rn> operand is in operand_t.reg, and the <Rd> operand is in operand_t.specflag1.

The important one tho is displacements (idaapi.o_displ) which stores the register index in operand_t.reg and the offset/address in operand_t.addr.

The 3 other operands tho that are a pain are memory references (idaapi.o_mem) which require you to read out of the database to get the inferred operand, flexops (idaapi.o_idpspec0) which take a shift operand, and listops (idaapi.o_idpspec1) which store the registers as a bitflag of operand_t.specval. I can explain those out too if you're interested in supprting them.

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