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Support rendering castellated holes correctly #325
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This is a good feature but unfortunately not easy to implement. Note to my future self or anyone who would want to work on this. One way to tackle it would be to rebuild the outline path from the edge cuts segments (i.e. stitch together the line segments, arcs, circles, etc) and use that path as a clipping region for the background layer. Care of the even-odd rule or outline winding direction should be taken to correctly process inner holes. Another way is to patch kicad to have the same logic I outlined above be exposed in api or to have the build outline stored in the pcb data. Less geometry related coding in ibom, more kicad source work. Also won't work for other supported formats. |
Feature request to render castellated holes (plated half-holes) correctly. In KiCad, plated holes which intersect the board outline are assumed to be castellated holes and are rendered correctly. The interactive BOM doesn't currently render these correctly.
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