Proposal to an alternative approach to epoch based memory management. #2844
Replies: 3 comments
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7ii can get a stale version of the per-cpu epoch state can incorrectly see the epoch as inactive when there is a thread executing in it. |
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Counter proposal:
In this model, there will still be a 2-phase commit of the next epoch. The only thing that would change is the mechanism for sending inter-process messages (from DPC -> ring-buffer), with opportunistic processing of messages. Note: |
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@Alan-Jowett and I discussed this offline. The below assumption in my original proposal (point number 6) is wrong: This is not doable without synchronization using locks or memory barriers. Hence this proposal will not be correct. The counter proposal offered by Alan will be considered as a performance optimization. |
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The motivation behind the epoch-based memory management was primarily to avoid expensive interlocked operations (due to reference counting) in hot path, e.g., invoking an eBPF program in network data path. Hence, it follows that the epoch-based solution for memory management too must avoid interlocked operations, or acquiring locks for synchronization, at least in the hot path. Another requirement would be to ensure minimal memory retention, i.e. unused memory is freed as soon as possible.
The epoch module in eBPF was introduced at the beginning of the project nearly three years ago. However, it went through several iterations of change. Each iteration improves on efficacy of the component. Throughout the iterations, the main idea of the component remained the same: a piece of memory that is marked for deletion, is freed only when it is certain that all the threads that were running at the time of the delete operations have exited.
The latest proposed changes (PR: #2796) introduces a two phase commit based algorithm, that involves passing messages sequentially from one cpu to the next using DPCs. The approach while eliminates locks, may suffer from stalling inbound network packets that are indicated to the OS using DPCs from the NIC driver, since the approach may frequently queue DPCs on the CPUs.
Here is an alternative approach to the epoch-based memory management that simplifies the process while keeping the main idea of the memory management intact.
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