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Upgrade to an ESP32 #19

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amcewen opened this issue Jul 14, 2024 · 7 comments
Open

Upgrade to an ESP32 #19

amcewen opened this issue Jul 14, 2024 · 7 comments
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@amcewen
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amcewen commented Jul 14, 2024

The ESP8266 is starting to lag too far behind the WLED capabilities. Although we've still got lots in stock, maybe we can leave them for the Ackers Bell or Mersey Dot?

Anyway, we should move to one of the cheap ESP32 modules, and switch to the "mini" version to make the board smaller.

@amcewen amcewen added this to the v2.1 milestone Jul 14, 2024
@amcewen
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amcewen commented Jul 14, 2024

I'd been assuming we'd go with an ESP32-C3 but thinking about the new Bluetooth Auracast tech (the broadcast audio option), having a module that supports that would open up some interesting possibilities with the sound-reactive versions.

The Auracast stuff needs Bluetooth 5.2 or higher, which means we should go with the ESP32-C6-MINI-1-N4 over the C3

@amcewen
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amcewen commented Nov 6, 2024

Tested the latest WLED on a C3 dev board, hooked up with a I2S microphone (an INMP441 on a breakout board this time) as detailed in the audio-reactive guide on the WLED wiki and it seems perfectly responsive with ~150 LEDs.

So, given support for the C6 will be some time away (and we might be able to upgrade the Bluetooth stack to support auracast on older boards, maybe?) we're going with a C3-MINI for this rework.

@huffeec
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huffeec commented Nov 6, 2024

Looking at the schematic for the C3 there are less GPIOs than we need

Of the 15 available

  • 2 (IO18/19) are D+/-
  • 2 rx/tx
  • 3 IO2/08/09 are strapping pins for boot mode

Section 4.1 Chip Boot Mode Control says that "GPIO2 actually does not determine SPI Boot and Joint Download Boot mode, but it is recommended to pull this pin up due to glitches"

IO8 (d/c SPI Download High)

IO9 needs to be accessible (High SPI Low Download)

Leaving 8 accessible pins, the current design uses:

  • 4 for level shifted data channels
  • 2 for leds
  • 2 pads for optional external crystal
  • 1 for reset button
  • -1 remaining

To provide I2S we need 3-4 pins available

We could use the two crystal pins but are still 3 pins short that we need to find from somewhere. Either from strapping pins (It seem odd to me that these are never available, or using less leds/data channels)

IO0 and IO1 are currently exposed as pads in case an external crystal is needed

@huffeec
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huffeec commented Nov 6, 2024

This page from Espressif seems to suggest that 08 needs to be pulled high in hardware which matches the C3 mini data sheet example circuit - section 9

The page linked in the Espressif discussion refers to a dev kit schematic that doesn't appear to have an IO8

@huffeec
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huffeec commented Nov 6, 2024

For reference and to aid my memory, the C3 mini dev kit schematic has 08 pulled high but not 02. Although the schematic is dated 2021 and the datasheet was updated in 2024 (V1.7) to change the boot pin requirements in 2024 so I suspect both are required.

So a potential solution would be. Use the two crystal pins also as GPIO as we almost certainly don't need them for this, lose the network led and make both additional data channels solderable pads (ie available as I2S gpio or connectable as data channels)

@huffeec
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huffeec commented Nov 6, 2024

Tasks remaining

  • Update references in schematic
  • Reduce edge cut to width of <48mm in pcb
  • Check for smaller footprint components eg L2/passives
  • Add second unpopulated usb socket
  • Retrace tracks
  • Update silkscreen
  • run DRC
  • run DRC
  • run DRC

@huffeec
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huffeec commented Nov 11, 2024

Final commit of new design for sense checking

New board functionality outlined with a new README.md in the Electronics folder

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