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Maxing out RAM (to 2x 32KB chips) #2

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izne opened this issue Mar 5, 2023 · 1 comment
Open

Maxing out RAM (to 2x 32KB chips) #2

izne opened this issue Mar 5, 2023 · 1 comment
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@izne
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izne commented Mar 5, 2023

Hereby discussing memory mapping and address decoding for a system with two RAM chips.

In general, to access multiple RAM chips, we need to ensure that the CPU can distinguish between the different RAM chips based on their respective memory addresses. This is typically done using an address decoder, which takes the address lines from the CPU and activates the appropriate RAM chip based on the address range.

In our specific case, we have two Winbond 24257 RAM chips.
Each chip has 32K of memory and requires 15 address lines (A0-A14) to access all of its memory locations. To address both chips, we need to use the CPU's 16-bit address bus, which provides 64K of address space. This means that we can use the first 32K of the address space to access the first RAM chip and the second 32K to access the second RAM chip.

We discussed several options for address decoding. One option is to use an 8-bit address decoder, such as a 74HCT138, to decode the most significant address bit (A15) and select between the two RAM chips. Another option is to use a combination of logic gates to decode the A15 and A14 address lines and select between the two RAM chips based on their combinations.

@izne izne added the enhancement New feature or request label Mar 5, 2023
@izne izne added this to the Revision 2 milestone Mar 5, 2023
@izne izne self-assigned this Mar 5, 2023
@izne
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izne commented Mar 6, 2023

A machine from the era would typically use 48KB of RAM and 16KB ROM.
This would require a second chip of size 16KB or simply using the half of another W24257.

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