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Incorrect Address width in descriptions for 3 SRAM modules #10

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shaos opened this issue Nov 28, 2022 · 5 comments · May be fixed by #11
Open

Incorrect Address width in descriptions for 3 SRAM modules #10

shaos opened this issue Nov 28, 2022 · 5 comments · May be fixed by #11
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@atorkmabrains @FaragElsayed2

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@shaos
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shaos commented Nov 28, 2022 •
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Expected Behavior

gf180mcu_fd_ip_sram__sram256x8m8wm1 should have A[7:0]
gf180mcu_fd_ip_sram__sram512x8m8wm1 should have A[8:0]
gf180mcu_fd_ip_sram__sram64x8m8wm1 should have A[5:0]

Actual Behavior

in documentation all sram modules have A[6:0] as address description so it's correct only for sram128x8 (this is only documentation issue - in verilog everything looks ok)

Steps to Reproduce the Problem

Look into these 3 CSV files:
cells/gf180mcu_fd_ip_sram__sram256x8m8wm1/specs/1_pins_desc.csv:A[6:0],Input,"Address Input. This Address input port is used to
cells/gf180mcu_fd_ip_sram__sram512x8m8wm1/specs/1_pins_desc.csv:A[6:0],Input,"Address Input. This Address input port is used to
cells/gf180mcu_fd_ip_sram__sram64x8m8wm1/specs/1_pins_desc.csv:A[6:0],Input,"Address Input. This Address input port is used to

Specifications

  • Version:
  • Platform:
@shaos
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shaos commented Nov 28, 2022

Initially noticed this problem here: https://gf180mcu-pdk.readthedocs.io/en/latest/IPs/ips.html

@mithro
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mithro commented Nov 28, 2022

@atorkmabrains - Could you take a look?

@atorkmabrains
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@FaragElsayed2 Could you please review the documentation?

@FaragElsayed2 FaragElsayed2 linked a pull request Apr 10, 2023 that will close this issue
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@FaragElsayed2
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@atorkmabrains I have checked it

@atorkmabrains
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Thanks @FaragElsayed2

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@atorkmabrains atorkmabrains

@FaragElsayed2 FaragElsayed2

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Updating SRAM docs with minor change mabrains/globalfoundries-pdk-ip-gf180mcu_fd_ip_sram
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@mithro @shaos @atorkmabrains @FaragElsayed2