SPI Master mode SDK Bugs and faulty behavior (GIT8266O-864)

[mr-sven]

Environment

• Development Kit: ESP12E
• IDF version master at d3a5f99
• Development Env: Make
• Operating System: Ubuntu
• Power Supply: USB

Problem Description

SPI Interface is improper working.

Expected Behavior

Bitmode: MSB
Bytemode: MSB (Big Endian) 32 Bit Transfer

Actual Behavior

Bitmode: LSB
Bytemode: MSB (Big Endian) 24 Bit Transfer, 8 Bit empty

Code to reproduce this issue

    spi_config_t spi_config = {
        .interface = {
            .bit_tx_order = SPI_BIT_ORDER_MSB_FIRST,
            .byte_tx_order = SPI_BYTE_ORDER_MSB_FIRST,
            .cs_en = 1,
            .mosi_en = 1,
        },
        .intr_enable.val = 0,
        .mode = SPI_MASTER_MODE,
        .clk_div = SPI_4MHz_DIV,
    };

    spi_init(HSPI_HOST, &spi_config);

    uint32_t buf[2] = {0x12345678, 0x12345678};

    spi_trans_t trans = {0};
    trans.bits.mosi = 8 * 8;
    trans.mosi = buf;
    spi_trans(HSPI_HOST, &trans);

Bitorder is wrong set:

ESP8266_RTOS_SDK/components/esp8266/include/driver/spi.h

Lines 33 to 34 in d3a5f99

	#define SPI_BIT_ORDER_MSB_FIRST 1
	#define SPI_BIT_ORDER_LSB_FIRST 0

differs from

ESP8266_RTOS_SDK/components/esp8266/include/esp8266/spi_struct.h

Line 60 in d3a5f99

uint32_t wr_bit_order: 1; /*In command address write-data (MOSI) phases 1: LSB firs 0: MSB first*/

SPI bus data using SPI_BYTE_ORDER_MSB_FIRST and data 0x12345678, 0x12345678:
0x12 0x34 0x56 0x00 0x12 0x34 0x56 0x00

SPI bus data using SPI_BYTE_ORDER_LSB_FIRST and data 0x12345678, 0x12345678:
0x78 0x56 0x34 0x12 0x78 0x56 0x34 0x12

• Bitorder defines SPI_BIT_ORDER_MSB_FIRST and SPI_BIT_ORDER_LSB_FIRST are swapped
• Byteorder MSB is dropping the last byte