diff --git a/gds/mprj_vias.gds.gz b/gds/mprj_vias.gds.gz
new file mode 100644
index 00000000..cb2492e9
Binary files /dev/null and b/gds/mprj_vias.gds.gz differ
diff --git a/gds/padframe_power_connections.gds.gz b/gds/padframe_power_connections.gds.gz
new file mode 100644
index 00000000..8816467f
Binary files /dev/null and b/gds/padframe_power_connections.gds.gz differ
diff --git a/lef/mprj_vias.lef b/lef/mprj_vias.lef
new file mode 100644
index 00000000..5075cac0
--- /dev/null
+++ b/lef/mprj_vias.lef
@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO mprj_vias
+  CLASS BLOCK ;
+  FOREIGN mprj_vias ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 0 BY 0 ;
+END mprj_vias
+END LIBRARY
+
diff --git a/lef/padframe_power_connections.lef b/lef/padframe_power_connections.lef
new file mode 100644
index 00000000..f931d6ea
--- /dev/null
+++ b/lef/padframe_power_connections.lef
@@ -0,0 +1,12 @@
+VERSION 5.7 ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+MACRO padframe_power_connections
+  CLASS BLOCK ;
+  FOREIGN padframe_power_connections ;
+  ORIGIN 0.000 0.000 ;
+  SIZE 0 BY 0 ;
+END padframe_power_connections
+END LIBRARY
+
diff --git a/verilog/gl/mprj_vias.v b/verilog/gl/mprj_vias.v
new file mode 100644
index 00000000..fc0b9c25
--- /dev/null
+++ b/verilog/gl/mprj_vias.v
@@ -0,0 +1,2 @@
+module mprj_vias ();
+endmodule
diff --git a/verilog/gl/padframe_power_connections.v b/verilog/gl/padframe_power_connections.v
new file mode 100644
index 00000000..36d6bfc0
--- /dev/null
+++ b/verilog/gl/padframe_power_connections.v
@@ -0,0 +1,2 @@
+module padframe_power_connections ();
+endmodule