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Export di Verilator Hardware Model #45: Pull request #8 synchronize by clundin25
January 6, 2025 18:34 7m 58s export-di
export-di
January 6, 2025 18:34 7m 58s
Export di Policy #45: Pull request #8 synchronize by clundin25
January 6, 2025 18:34 2m 10s export-di
export-di
January 6, 2025 18:34 2m 10s
Export di Build and Test #45: Pull request #8 synchronize by clundin25
January 6, 2025 18:34 42s export-di
export-di
January 6, 2025 18:34 42s
Export di Size History #46: Pull request #8 synchronize by clundin25
January 6, 2025 18:34 2m 17s export-di
export-di
January 6, 2025 18:34 2m 17s
Fix tests linter issues. .github/workflows/versioned-full-build-test.yml #45: Commit 8080dbb pushed by clundin25
January 6, 2025 18:34 Failure export-di
export-di
January 6, 2025 18:34 Failure
Export di Policy #44: Pull request #8 synchronize by clundin25
January 6, 2025 18:15 2m 1s export-di
export-di
January 6, 2025 18:15 2m 1s
Export di Build and Test #44: Pull request #8 synchronize by clundin25
January 6, 2025 18:15 4m 28s export-di
export-di
January 6, 2025 18:15 4m 28s
Export di Size History #45: Pull request #8 synchronize by clundin25
January 6, 2025 18:15 2m 28s export-di
export-di
January 6, 2025 18:15 2m 28s
Export di Verilator Hardware Model #44: Pull request #8 synchronize by clundin25
January 6, 2025 18:15 5m 37s export-di
export-di
January 6, 2025 18:15 5m 37s
Export di FPGA Build #44: Pull request #8 synchronize by clundin25
January 6, 2025 18:15 1d 17h 0m 33s export-di
export-di
January 6, 2025 18:15 1d 17h 0m 33s
Fix linter. .github/workflows/versioned-full-build-test.yml #44: Commit c8c9dbe pushed by clundin25
January 6, 2025 18:15 Failure export-di
export-di
January 6, 2025 18:15 Failure
Export di Policy #43: Pull request #8 synchronize by clundin25
January 6, 2025 18:02 2m 1s export-di
export-di
January 6, 2025 18:02 2m 1s
Export di Verilator Hardware Model #43: Pull request #8 synchronize by clundin25
January 6, 2025 18:02 4m 5s export-di
export-di
January 6, 2025 18:02 4m 5s
Export di Size History #44: Pull request #8 synchronize by clundin25
January 6, 2025 18:02 2m 12s export-di
export-di
January 6, 2025 18:02 2m 12s
Export di Build and Test #43: Pull request #8 synchronize by clundin25
January 6, 2025 18:02 52s export-di
export-di
January 6, 2025 18:02 52s
Export di FPGA Build #43: Pull request #8 synchronize by clundin25
January 6, 2025 18:02 1d 17h 13m 6s export-di
export-di
January 6, 2025 18:02 1d 17h 13m 6s
Update DPE submodule. .github/workflows/versioned-full-build-test.yml #43: Commit 93da9b6 pushed by clundin25
January 6, 2025 18:02 Failure export-di
export-di
January 6, 2025 18:02 Failure
Export di Size History #43: Pull request #8 synchronize by clundin25
January 6, 2025 18:01 2m 57s export-di
export-di
January 6, 2025 18:01 2m 57s
Export di Verilator Hardware Model #42: Pull request #8 synchronize by clundin25
January 6, 2025 18:01 3m 48s export-di
export-di
January 6, 2025 18:01 3m 48s
Export di Policy #42: Pull request #8 synchronize by clundin25
January 6, 2025 18:01 2m 13s export-di
export-di
January 6, 2025 18:01 2m 13s
Export di Build and Test #42: Pull request #8 synchronize by clundin25
January 6, 2025 18:01 48s export-di
export-di
January 6, 2025 18:01 48s
Export di FPGA Build #42: Pull request #8 synchronize by clundin25
January 6, 2025 18:01 1d 17h 14m 33s export-di
export-di
January 6, 2025 18:01 1d 17h 14m 33s
Update DPE submodule. .github/workflows/versioned-full-build-test.yml #42: Commit e69b950 pushed by clundin25
January 6, 2025 18:01 Failure export-di
export-di
January 6, 2025 18:01 Failure
Nightly Release Nightly Release #1: Scheduled
January 4, 2025 10:30 1d 0h 44m 59s main
main
January 4, 2025 10:30 1d 0h 44m 59s
Export di Size History #42: Pull request #8 opened by clundin25
January 3, 2025 21:37 1h 12m 47s export-di
export-di
January 3, 2025 21:37 1h 12m 47s