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At the top of main, we should be able to assume that all PORT/DDR registers are zeroed.
main
PORT
DDR
This should let LLVM optimise RMW OR/AND/NOT instructions into a simple assignment.
The text was updated successfully, but these errors were encountered:
Maybe a macro that expands to something like
llvm::assume(PORTB::read() == 0); ...
We could tell all users to insert this into the top of main.
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all PORT/DDR registers are zeroed.
And that's true on soft restarts too?
Perhaps there could be a compiler flag to insert that, too.
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At the top of
main
, we should be able to assume that allPORT
/DDR
registers are zeroed.This should let LLVM optimise RMW OR/AND/NOT instructions into a simple assignment.
The text was updated successfully, but these errors were encountered: