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I2S interface sample size configuration issue #570
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Streaming audio sample via DMA to the I2S Controller ran into underrun condition which resulted in glitching the I2S Serial Clock. The I2S output was connected to an amplifier to drive a pair of speakers. Due to the glitching of the I2S clock, the audio output was distorted. |
Indeed, the emptying of the I2S FIFO causes the I2S h/w interface to go into error mode and resetting the h/w module is required thereafter. As a consequent, the physical I2S connection is disrupted and the target device(s) has to re-sync on the following transaction. This process causes the losing of data samples. |
The only sample size it is supporting is 32 bit right now.
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