List of several designs/tools I have worked on over the years to avoid reinventing the wheel.
- RaveNoC: Configurable Network-on-Chip described in SystemVerilog.
- NoX: Soft-core RISC-V RV32I with AMBA compatible interfaces and FreeRTOS port.
- DMA: DMA engine based on AMBA AXI protocol, fully configurable.
- Skid Buffer: Skid buffer is to break the combinatorial path between the sender and receiver interfaces, also known as
register slices(AMBA convention). - Simple interrupt controller: Generic interrupt controller with configurable fifo size and fixed priority.
- SPI Master: AXI SPI design with programmable FIFO buffer size and external IOs.
- M-TIMER RISC-V: Simple machine timer design fully compatible with privileged RISC-V specification.
- Reset controller: Reset controller used to define start vector value for general purpose CPUs and software controllable reset output.
- Synchronous general-purpose FIFO: Synchronous FIFO design.
- Asynchronous general-purpose FIFO: Asynchronous FIFO design.
- CDC 2-FF: General clock-crossing 2FF design.
- AXI ROM wrapper: General ROM wrapper design for auto-generated images.
- Ethernet AXI: Ethernet R/GMII wrapper design.
- Bus arch pkg: SV packages for common AMBA interfaces.
- RR arbiter: Generic Round-Robin arbiter.
- CDC components: Generic clock-crossing designs.
- MPSoC example design: Multi-Processor System-on-Chip example design with 100x RISC-V (VeX) cores.
- Test of HWACHA Vector accel: Test of hwacha vector design for rocket-chip.
- IIR Filter: Simple Infinite impulse response (IIR) in verilog.
- PCIe small design: PCIe example project for Xilinx FPGAS.
- RISC-V SoC model: Generic SoC using RI5CY CPU.
- Cocotb template repo: Template repository to test designs using cocotb framework.
- Cocotbext-AHB: AHB Bus driver for Cocotb cosimulation framework.
- IPSoCGen: MP/SoC generation framework built in python.
- IPSoCGen Template: Reference design repository for the IPSoCGen framework.
- NoX FreeRTOS port: Port of FreeRTOS for NoX CPU.
- MQTT-SN port for 6lowpan: MQTT-SN port for the 6lowpan for ARM Tiva series from TI.
- Bootloader for NoX CPU: Simple bootloader using UART as interface to transfer program files.
- Bootloader script in python: Complementary bootloader script in python to transfer .elf files.
- MPSoC examples - Histogram, Filter...: Few examples for MPSoCs apps running on FreeRTOS.