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As an addendum to this issue: #298
If one doesn't use/set the object (port, signal, variable), VHDL-LS correctly flags a warning that it's not set - all good :) .
However, if the object is used for example as bla'sig_obj'subtype then the warning goes away even though the object is kind of not set. I'm not sure if that's a desirable feature to also output warning if the signal is not set rather than just used to get meta data.
The text was updated successfully, but these errors were encountered:
It's a good question whether this should be marked as an unused declaration or not. rust-analyzer does something similar when a variable is only used in recursion, so maybe vhdl_ls should emit an error in a similar fashion?
Or maybe, we introduce 2 kind of flags, which then indicates that the object is only used as a reference and the other one remains the same if it's not used.
As an addendum to this issue: #298
If one doesn't use/set the object (port, signal, variable), VHDL-LS correctly flags a warning that it's not set - all good :) .
However, if the object is used for example as
bla'sig_obj'subtype
then the warning goes away even though the object is kind of not set. I'm not sure if that's a desirable feature to also output warning if the signal is not set rather than just used to get meta data.The text was updated successfully, but these errors were encountered: