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Create a UART core for custom serial interfaces routed via the PL #65

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twitzelbos opened this issue Mar 31, 2023 · 0 comments
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@twitzelbos
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For in-scanner-room applications of Zynq FPGAs, a fiberoptic communications link can be desirable. Implement a basic UART core that can operate a fiber-optic connection via PL GPIO pins and look like a UART to the PS.

Provide full integration with the PS software.

@twitzelbos twitzelbos added the help wanted Extra attention is needed label Mar 31, 2023
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