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GD23ZU_FH.cpp
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GD23ZU_FH.cpp
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/*
* FT81X FTDI screens Library for Teensy 3.5/6 and STM32F1x, F4 and F7
* based on STM32_GD2 by nopnop2002
* https://github.com/nopnop2002/STM32_GD2
*
* FT800/81X TFT Library for STM32F103
* based on GD23STM32_F103x by lightcalamar
* https://github.com/lightcalamar/GD23STM32_F103x
*
* GD23STM32_F103x has been developed based on Gameduino 2 library.
* Copyright (C) 2013-2016 by James Bowman <[email protected]>
* Gameduino 2 library for Arduino, Arduino Due, Raspberry Pi.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* GD23ZU Library for STM32Fx and Teensy 3.5/6
*
* MexSpa Team contribution for https://ft81xmania.com
* June 7, 2018
*
* May 6, 2019 --- Update for Matrix Orbital EVE3-50G
* May 27, 2019 --- Add support for the SDIO reader of the M4-DEMO board
* June 28, 2019 --- Add support for the Nucleo F767ZI from Arduino Core STM32 v 1.6.0
* June 28, 2019 --- Add support for SdFat(1.0.14) for Nucleo F767ZI from Arduino Core STM32 v 1.6.0
*/
#include <Arduino.h>
//#include <EEPROM.h>
#include <SPI.h>
#include <SdFat.h> // https://github.com/greiman/SdFat
#include <GD23ZU_FH.h>
#include "transports/wiring.h"
#ifdef ARDUINO_ARCH_STM32
#if(STM32_CPU == 4071)
SdFatSdio SD; //M4DEMO con SDIO core-Danieleff
#endif
#if(STM32_CPU == 4070)
SdFat SD(2); //M4DEMO con PB12 core-Danieleff
#endif
#if(STM32_CPU == 429)
SdFat SD(3); // STM32F429/Core7XXI CON PA15 Core-Danieleff
#endif
#if(STM32_CPU == 746)
SdFat SD(3); // STM32F429/Core7XXI CON PA15 Core-Danieleff
#endif
#if(STM32_CPU == 767)
SdFat SD(3); // STM32F767 CON PB11 Core-Danieleff
#endif
#if(STM32_CPU == 7670)
SPIClass SPI_3(PB2, PB4, PB3); //CoreOfficial 180 STM32
SdFat SD(&SPI_3);
//SdFatEX SD(&SPI_3); //para SDIO
#endif
#if(STM32_CPU == 743)
SPIClass SPI_3(PB2, PB4, PB3); //CoreOfficial 180 STM32
SdFat SD(&SPI_3);
//SdFatEX SD(&SPI_3); //para SDIO
#endif
#endif
#ifdef TEENSYDUINO
SdFatSdioEX SD; // Teensy 3.6-3.5
#endif
#if defined(ARDUINO_ARCH_AVR)
SdFat SD;
#endif
byte ft8xx_model; // 0:FT800 / 1:FT81x
uint16_t FT800_model; // 0x00:FT800/0x10:FT810/0x11:FT811/0x12:FT812/0x13:FT813/0x15:BT815/0x16:BT816
void xy::set(int _x, int _y)
{
x = _x;
y = _y;
}
void xy::rmove(int distance, int angle)
{
x -= GD.rsin(distance, angle);
y += GD.rcos(distance, angle);
}
int xy::angleto(class xy &other)
{
int dx = other.x - x, dy = other.y - y;
return GD.atan2(dy, dx);
}
void xy::draw(byte offset)
{
GD.Vertex2f(x - PIXELS(offset), y - PIXELS(offset));
}
int xy::onscreen(void)
{
return (0 <= x) &&
(x < PIXELS(GD.w)) &&
(0 <= y) &&
(y < PIXELS(GD.h));
}
class xy xy::operator+=(class xy &other)
{
x += other.x;
y += other.y;
return *this;
}
class xy xy::operator-=(class xy &other)
{
x -= other.x;
y -= other.y;
return *this;
}
class xy xy::operator<<=(int d)
{
x <<= d;
y <<= d;
return *this;
}
long xy::operator*(class xy &other)
{
return (long(x) * other.x) + (long(y) * other.y);
}
class xy xy::operator*=(int s)
{
x *= s;
y *= s;
return *this;
}
int xy::nearer_than(int distance, xy &other)
{
int lx = abs(x - other.x);
if (lx > distance)
return 0;
int ly = abs(y - other.y);
if (ly > distance)
return 0;
// trivial accept: 5/8 is smaller than 1/sqrt(2)
int d2 = (5 * distance) >> 3;
if ((lx < d2) && (ly < d2))
return 1;
return ((lx * lx) + (ly * ly)) < (distance * distance);
}
////////////////////////////////////////////////////////////////////////
void xy::rotate(int angle)
{
// the hardware's convention that rotation is clockwise
int32_t s = GD.rsin(32767, angle);
int32_t c = GD.rcos(32767, angle);
int xr = ((x * c) - (y * s)) >> 15;
int yr = ((x * s) + (y * c)) >> 15;
x = xr;
y = yr;
}
void Bitmap::fromtext(int font, const char* s)
{
GD.textsize(size.x, size.y, font, s);
int pclk = GD.rd16(REG_PCLK);
int vsize = GD.rd16(REG_VSIZE);
int hsize = GD.rd16(REG_HSIZE);
GD.finish();
GD.wr(REG_PCLK, 0);
delay(1);
GD.wr16(REG_HSIZE, size.x);
GD.wr16(REG_VSIZE, size.y);
GD.cmd_dlstart();
GD.Clear();
GD.BlendFunc(1,1);
GD.cmd_text(0, 0, font, 0, s);
GD.swap();
GD.loadptr = (GD.loadptr + 1) & ~1;
GD.cmd_snapshot(GD.loadptr);
GD.finish();
GD.wr16(REG_HSIZE, hsize);
GD.wr16(REG_VSIZE, vsize);
GD.wr16(REG_PCLK, pclk);
defaults(ARGB4);
}
void Bitmap::fromfile(const char* filename, int format)
{
GD.loadptr = (GD.loadptr + 1) & ~1;
GD.cmd_loadimage(GD.loadptr, OPT_NODL);
GD.load(filename);
uint32_t ptr, w, h;
GD.cmd_getprops(ptr, w, h);
GD.finish();
size.x = GD.rd16(w);
size.y = GD.rd16(h);
defaults(format);
}
static const PROGMEM uint8_t bpltab[] = {
/* 0 ARGB1555 */ 0,
/* 1 L1 */ 4,
/* 2 L4 */ 2,
/* 3 L8 */ 1,
/* 4 RGB332 */ 1,
/* 5 ARGB2 */ 1,
/* 6 ARGB4 */ 0,
/* 7 RGB565 */ 0,
/* 8 PALETTED */ 1,
/* 9 TEXT8X8 */ 0,
/* 10 TEXTVGA */ 0,
/* 11 BARGRAPH */ 1,
/* 12 */ 0,
/* 13 */ 0,
/* 14 */ 0,
/* 15 */ 0,
/* 16 */ 0,
/* 17 L2 */ 3
};
void Bitmap::defaults(uint8_t f)
{
source = GD.loadptr;
format = f;
handle = -1;
center.x = size.x / 2;
center.y = size.y / 2;
GD.loadptr += (long)((size.x << 1) >> pgm_read_byte_near(bpltab + f)) * size.y;
}
void Bitmap::setup(void)
{
GD.BitmapSource(source);
int bpl = (size.x << 1) >> pgm_read_byte_near(bpltab + format);
GD.BitmapLayout(format, bpl, size.y);
GD.BitmapSize(NEAREST, BORDER, BORDER, size.x, size.y);
}
void Bitmap::bind(uint8_t h)
{
handle = h;
GD.BitmapHandle(handle);
setup();
}
#define IS_POWER_2(x) (((x) & ((x) - 1)) == 0)
void Bitmap::wallpaper()
{
if (handle == -1) {
GD.BitmapHandle(15);
setup();
} else {
GD.BitmapHandle(handle);
}
GD.Begin(BITMAPS);
// if power-of-2, can just use REPEAT,REPEAT
// otherwise must draw it across whole screen
if (IS_POWER_2(size.x) && IS_POWER_2(size.y)) {
GD.BitmapSize(NEAREST, REPEAT, REPEAT, GD.w, GD.h);
GD.Vertex2f(0, 0);
} else {
for (int x = 0; x < GD.w; x += size.x)
for (int y = 0; y < GD.h; y += size.y)
GD.Vertex2f(x << 4, y << 4);
}
}
void Bitmap::draw(int x, int y, int16_t angle)
{
xy pos;
pos.set(x, y);
pos <<= 4;
draw(pos, angle);
}
void Bitmap::draw(const xy &p, int16_t angle)
{
xy pos = p;
if (handle == -1) {
GD.BitmapHandle(15);
setup();
} else {
GD.BitmapHandle(handle);
}
GD.Begin(BITMAPS);
if (angle == 0) {
xy c4 = center;
c4 <<= 4;
pos -= c4;
GD.BitmapSize(NEAREST, BORDER, BORDER, size.x, size.y);
GD.Vertex2f(pos.x, pos.y);
} else {
// Compute the screen positions of 4 corners of the bitmap
xy corners[4] = {
{0,0 },
{size.x, 0 },
{0, size.y },
{size.x, size.y },
};
for (int i = 0; i < 4; i++) {
xy &c = corners[i];
c -= center;
c <<= 4;
c.rotate(angle);
c += pos;
}
// Find top-left and bottom-right boundaries
xy topleft, bottomright;
topleft.set(
min(min(corners[0].x, corners[1].x), min(corners[2].x, corners[3].x)),
min(min(corners[0].y, corners[1].y), min(corners[2].y, corners[3].y)));
bottomright.set(
max(max(corners[0].x, corners[1].x), max(corners[2].x, corners[3].x)),
max(max(corners[0].y, corners[1].y), max(corners[2].y, corners[3].y)));
// span is the total size of this region
xy span = bottomright;
span -= topleft;
GD.BitmapSize(BILINEAR, BORDER, BORDER,
(span.x + 15) >> 4, (span.y + 15) >> 4);
// Set up the transform and draw the bitmap
pos -= topleft;
GD.SaveContext();
GD.cmd_loadidentity();
GD.cmd_translate((int32_t)pos.x << 12, (int32_t)pos.y << 12);
GD.cmd_rotate(angle);
GD.cmd_translate(F16(-center.x), F16(-center.y));
GD.cmd_setmatrix();
GD.Vertex2f(topleft.x, topleft.y);
GD.RestoreContext();
}
}
class Bitmap __fromatlas(uint32_t a)
{
Bitmap r;
r.size.x = GD.rd16(a);
r.size.y = GD.rd16(a + 2);
r.center.x = GD.rd16(a + 4);
r.center.y = GD.rd16(a + 6);
r.source = GD.rd32(a + 8);
r.format = GD.rd(a + 12);
r.handle = -1;
return r;
}
////////////////////////////////////////////////////////////////////////
static GDTransport GDTR;
GDClass GD;
////////////////////////////////////////////////////////////////////////
// The GD3 has a tiny configuration EEPROM - AT24C01D
// It is programmed at manufacturing time with the setup
// commands for the connected panel. The SCL,SDA lines
// are connected to thye FT81x GPIO0, GPIO1 signals.
// This is a read-only driver for it. A single method
// 'read()' initializes the RAM and reads all 128 bytes
// into an array.
class ConfigRam {
private:
uint8_t gpio, gpio_dir, sda;
void set_SDA(byte n)
{
if (sda != n) {
GDTR.__wr16(REG_GPIO_DIR, gpio_dir | (0x03 - n)); // Drive SCL, SDA low
sda = n;
}
}
void set_SCL(byte n)
{
GDTR.__wr16(REG_GPIO, gpio | (n << 1));
}
int get_SDA(void)
{
return GDTR.__rd16(REG_GPIO) & 1;
}
void i2c_start(void)
{
set_SDA(1);
set_SCL(1);
set_SDA(0);
set_SCL(0);
}
void i2c_stop(void)
{
set_SDA(0);
set_SCL(1);
set_SDA(1);
set_SCL(1);
}
int i2c_rx1()
{
set_SDA(1);
set_SCL(1);
byte r = get_SDA();
set_SCL(0);
return r;
}
void i2c_tx1(byte b)
{
set_SDA(b);
set_SCL(1);
set_SCL(0);
}
int i2c_tx(byte x)
{
for (byte i = 0; i < 8; i++, x <<= 1)
i2c_tx1(x >> 7);
return i2c_rx1();
}
int i2c_rx(int nak)
{
byte r = 0;
for (byte i = 0; i < 8; i++)
r = (r << 1) | i2c_rx1();
i2c_tx1(nak);
return r;
}
public:
void read(byte *v)
{
GDTR.__end();
gpio = GDTR.__rd16(REG_GPIO) & ~3;
gpio_dir = GDTR.__rd16(REG_GPIO_DIR) & ~3;
sda = 2;
// 2-wire software reset
i2c_start();
i2c_rx(1);
i2c_start();
i2c_stop();
int ADDR = 0xa0;
i2c_start();
if (i2c_tx(ADDR))
return;
if (i2c_tx(0))
return;
i2c_start();
if (i2c_tx(ADDR | 1))
return;
for (int i = 0; i < 128; i++) {
*v++ = i2c_rx(i == 127);
}
i2c_stop();
GDTR.resume();
}
};
//RndMnkIII
const uint16_t GDClass::TAM_BUFFER_SD=8192; //8192 2048
const uint16_t GDClass::TAM_BUFFER_FT=2048; //2048 512
byte GDClass::buf[TAM_BUFFER_SD];
byte GDClass::FTbuf[TAM_BUFFER_FT];
void GDClass::flush(void)
{
GDTR.flush();
}
void GDClass::swap(void) {
Display();
cmd_swap();
cmd_loadidentity();
cmd_dlstart();
GDTR.flush();
#ifdef DUMPDEV
GDTR.swap();
#endif
}
uint32_t GDClass::measure_freq(void)
{
unsigned long t0 = GDTR.rd32(REG_CLOCK);
delayMicroseconds(15625);
unsigned long t1 = GDTR.rd32(REG_CLOCK);
return (t1 - t0) << 6;
}
#if 0
#if (TFT_FT81X_ENABLE == 0)
#define LOW_FREQ_BOUND 47040000UL
#endif
#if (TFT_FT81X_ENABLE == 1)
#define LOW_FREQ_BOUND 58800000UL
#endif
#if (FT800_model == 0x15)
#define LOW_FREQ_BOUND 60000000UL
#endif
// #define LOW_FREQ_BOUND 32040000UL
#endif
void GDClass::tune(void)
{
uint32_t LOW_FREQ_BOUND = 32040000;
if (FT800_model == 0)
if (FT800_model == 1)
LOW_FREQ_BOUND = 47040000;
uint32_t f;
for (byte i = 0; (i < 31) && ((f = measure_freq()) < LOW_FREQ_BOUND); i++) {
GDTR.wr(REG_TRIM, i);
}
GDTR.wr32(REG_FREQUENCY, f);
}
void GDClass::begin(uint8_t options) {
GDTR.begin0();
if (options & GD_STORAGE)
{
// pinMode(SD_PIN, OUTPUT);
// digitalWrite(SD_PIN, HIGH);
// SD.begin(SD_PIN);
//FT81xmania
#if defined(ARDUINO_ARCH_STM32)
#if(STM32_CPU == 4071)
SD.begin();
#endif
#if(STM32_CPU == 4070)
SD.begin(SD_PIN, SD_SCK_MHZ(36)); // STM32
#endif
#if(STM32_CPU == 429)
SD.begin(SD_PIN, SD_SCK_MHZ(36)); // STM32
#endif
#if(STM32_CPU == 767)
SD.begin(SD_PIN, SD_SCK_MHZ(36)); // STM32
#endif
#if(STM32_CPU == 7670)
SD.begin(SD_PIN, SD_SCK_MHZ(56)); // STM32
#endif
#if(STM32_CPU == 743)
SD.begin(SD_PIN, SD_SCK_MHZ(56)); // STM32
#endif
#if(STM32_CPU == 746)
SD.begin(SD_PIN, SD_SCK_MHZ(36)); // STM32
#endif
#if(STM32_CPU == 103)
SD.begin(SD_PIN, SD_SCK_MHZ(36)); // STM32
#endif
#endif
#if defined(TEENSYDUINO)
SD.begin(); // Teensy 3.6-3.5
#endif
//FT81xmania
}
FT800_model = GDTR.begin1();
EVE_CHIP=GDTR.begin1();
GDTR.wr(REG_PWM_DUTY, 0);
GDTR.wr(REG_GPIO_DIR, 0x83);
GDTR.wr(REG_GPIO, GDTR.rd(REG_GPIO) | 0x80);
ConfigRam cr;
byte v8[128] = {0};
cr.read(v8);
#if 0
if ((v8[1] == 0xff) && (v8[2] == 0x01)) {
options &= ~(GD_TRIM | GD_CALIBRATE);
if (v8[3] & 2) {
GDTR.__end();
GDTR.hostcmd(0x44); // switch to external crystal
GDTR.resume();
}
copyram(v8 + 4, 124);
finish();
} else {
#endif
// ******************************************************************************************
//if (ft8xx_model == 00) // FT800 Series
if (FT800_model == 00) // FT800 Series
if (FT800_model == 01) // FT801 Series
{
//431 En pruebas***
if (SizeFT813==431)
{
GD.wr32(REG_HCYCLE, 548);
GD.wr32(REG_HOFFSET, 43);
GD.wr32(REG_HSIZE, 480);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 41);
GD.wr32(REG_VCYCLE, 292);
GD.wr32(REG_VOFFSET, 12);
GD.wr32(REG_VSIZE, 272);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_PCLK, 5);
GD.wr32(REG_PCLK_POL, 1);
//GD.wr32(REG_CSPREAD, 0);
//GD.wr32(REG_DITHER, 1);
//GDTR.wr(REG_PCLK_POL, 1);
//GDTR.wr(REG_PCLK, 5);
// Avoid inverted colours on alternative-FT800 boards
#if PROTO == 0
GDTR.wr(REG_SWIZZLE, 0);
#endif
#if PROTO == 1
GDTR.wr(REG_SWIZZLE, 3);
#endif
}
GDTR.wr(REG_ROTATE, ROTACION);
}
// ******************************************************************************************
//FT81xmania
if(FT800_model == 0x15) // BT815
{
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_HCYCLE, 928);
GD.wr32(REG_HOFFSET, 88);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 48);
GD.wr32(REG_VCYCLE, 525);
GD.wr32(REG_VOFFSET, 32);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 3);
GD.wr32(REG_PCLK, 2);
GD.wr32(REG_SWIZZLE, 0);
GD.wr32(REG_PCLK_POL, 1);
GD.wr32(REG_CSPREAD, 0);
GD.wr32(REG_DITHER, 1);
//GD.wr32(REG_TOUCH_CONFIG, 0x0000005D1);
GD.wr16(REG_TOUCH_CONFIG, 0x05D1);
//GD.wr16(REG_TOUCH_CONFIG, 0x05D0);
}
//FT81xmania
if(FT800_model == 0x10) // FT810
{
GD.wr32(REG_HCYCLE, 900);//548
GD.wr32(REG_HOFFSET, 43);
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 41);
GD.wr32(REG_VCYCLE, 500);
GD.wr32(REG_VOFFSET, 12);
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_DITHER, 1);
GD.wr32(REG_PCLK_POL, 1);//1
GD.wr32(REG_PCLK, 3);//5
//GD.wr(REG_ROTATE, 0);
GD.wr(REG_SWIZZLE, 0);//3 for GD2
}
//******************************************************************************************
if(FT800_model == 0x11) // FT811
{
GD.wr32(REG_HCYCLE, 1000);//548
GD.wr32(REG_HOFFSET, 43);
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 41);
GD.wr32(REG_VCYCLE, 500);
GD.wr32(REG_VOFFSET, 12);
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_DITHER, 1);
GD.wr32(REG_PCLK_POL, 1);//1
GD.wr32(REG_PCLK, 3);//5
//GD.wr(REG_ROTATE, 0);
GD.wr(REG_SWIZZLE, 0);//3 for gameduino 2
}
// ******************************************************************************************
if(FT800_model == 0x13) // FT813
{
// GD.wr32(REG_HSIZE, 800);
// GD.wr32(REG_VSIZE, 480);
// GD.wr32(REG_HCYCLE, 1056);//1000
// GD.wr32(REG_HOFFSET, 46);
// GD.wr32(REG_HSYNC0, 0);
// GD.wr32(REG_HSYNC1, 10); //41
// GD.wr32(REG_VCYCLE, 525);
// GD.wr32(REG_VOFFSET, 23);
// GD.wr32(REG_VSYNC0, 0);
// GD.wr32(REG_VSYNC1, 10);
// GD.wr32(REG_PCLK, 2);//5
// GD.wr32(REG_SWIZZLE, 0);//3 for GD2
// GD.wr32(REG_PCLK_POL, 1);//1
// GD.wr32(REG_CSPREAD, 0);
// GD.wr32(REG_DITHER, 0);
if (SizeFT813==71)
{
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_HCYCLE, 1056);//1000
GD.wr32(REG_HOFFSET, 46);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 10); //41
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_VCYCLE, 525);
GD.wr32(REG_VOFFSET, 23);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_SWIZZLE, 0);//3 for GD2
GD.wr32(REG_PCLK, 2);//5
GD.wr32(REG_PCLK_POL, 1);//1
GD.wr32(REG_CSPREAD, 0);
GD.wr32(REG_DITHER, 0);
}
if (SizeFT813==7)
{
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_HCYCLE, 1056);//1000
GD.wr32(REG_HOFFSET, 46);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 10); //41
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_VCYCLE, 525);
GD.wr32(REG_VOFFSET, 23);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_SWIZZLE, 0);//3 for GD2
GD.wr32(REG_PCLK, 2);//5
GD.wr32(REG_PCLK_POL, 1);//1
GD.wr32(REG_CSPREAD, 0);
GD.wr32(REG_DITHER, 0);
}
if (SizeFT813==52)
{
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_HCYCLE, 928);
GD.wr32(REG_HOFFSET, 88);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 48);
GD.wr32(REG_VCYCLE, 525);
GD.wr32(REG_VOFFSET, 32);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 3);
GD.wr32(REG_PCLK, 2);
GD.wr32(REG_SWIZZLE, 0);
GD.wr32(REG_PCLK_POL, 1);
GD.wr32(REG_CSPREAD, 0);
GD.wr32(REG_DITHER, 1);
GD.wr16(REG_TOUCH_CONFIG, 0x05D1);
}
if (SizeFT813==51)
{
GD.wr32(REG_HCYCLE, 1056); // 900 //548
GD.wr32(REG_HOFFSET, 46); // 46
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 10); // 41
GD.wr32(REG_VCYCLE, 525); // 500
GD.wr32(REG_VOFFSET, 23); // 23
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_PCLK, 2);
GD.wr32(REG_PCLK_POL, 0);
GD.wr32(REG_CSPREAD, 0); // 1
GD.wr32(REG_DITHER, 1); // 1
}
if (SizeFT813==5)
{
//GD.wr32(REG_HCYCLE, 1056); // 900 //548
//GD.wr32(REG_HOFFSET, 88); // 46
//GD.wr32(REG_HSIZE, 800);
//GD.wr32(REG_HSYNC0, 0);
//GD.wr32(REG_HSYNC1, 10); // 41
//GD.wr32(REG_VCYCLE, 525); // 500
//GD.wr32(REG_VOFFSET, 32); // 23
//GD.wr32(REG_VSIZE, 480);
//GD.wr32(REG_VSYNC0, 0);
//GD.wr32(REG_VSYNC1, 10);
//GD.wr32(REG_PCLK, 2);
//GD.wr32(REG_PCLK_POL, 0);
//GD.wr32(REG_CSPREAD, 0); // 1
//GD.wr32(REG_DITHER, 1); // 1
GD.wr32(REG_HCYCLE, 1056);//1000
GD.wr32(REG_HSIZE, 800);
GD.wr32(REG_HOFFSET, 88);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 10); //41
GD.wr32(REG_VCYCLE, 525);
GD.wr32(REG_VOFFSET, 32);
GD.wr32(REG_VSIZE, 480);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_SWIZZLE, 0);//3 for GD2
GD.wr32(REG_PCLK, 2);//5
GD.wr32(REG_PCLK_POL, 0);//1
GD.wr32(REG_CSPREAD, 0);
GD.wr32(REG_DITHER, 0); //solo ajuste este a 0 XD
}
if (SizeFT813==43)
{
GD.wr32(REG_HSIZE, 480);
GD.wr32(REG_HCYCLE, 548);
GD.wr32(REG_HOFFSET, 43);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 41);
GD.wr32(REG_VSIZE, 272);
GD.wr32(REG_VCYCLE, 292);
GD.wr32(REG_VOFFSET, 12);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 10);
GD.wr32(REG_PCLK, 5);//5
GD.wr32(REG_SWIZZLE, 0);//3 for GD2
GD.wr32(REG_PCLK_POL, 1);//1
GD.wr32(REG_CSPREAD, 1);//1
GD.wr32(REG_DITHER, 1);
//GD.wr(REG_ROTATE, 0);
}
if (SizeFT813==35)
{
GD.wr32(REG_HSIZE, 320);
GD.wr32(REG_HCYCLE, 408);
GD.wr32(REG_HOFFSET, 70);
GD.wr32(REG_HSYNC0, 0);
GD.wr32(REG_HSYNC1, 10);
GD.wr32(REG_VSIZE, 240);
GD.wr32(REG_VCYCLE, 263);
GD.wr32(REG_VOFFSET, 13);
GD.wr32(REG_VSYNC0, 0);
GD.wr32(REG_VSYNC1, 2);
GD.wr32(REG_PCLK, 6);//5
GD.wr32(REG_SWIZZLE, 2);//3 for GD2
GD.wr32(REG_PCLK_POL, 1);//1
GD.wr32(REG_CSPREAD, 0);//1
GD.wr32(REG_DITHER, 0);
//GD.wr(REG_ROTATE, 0);
}
if (SizeFT813==38)
{
GD.wr32(REG_HSIZE, 480); //480
GD.wr32(REG_VSIZE, 272); //272
GD.wr32(REG_HCYCLE, 595); //548 595
GD.wr32(REG_HOFFSET, 43); //43
GD.wr32(REG_HSYNC0, 35); //0 35
GD.wr32(REG_HSYNC1, 101); //41 101
GD.wr32(REG_VCYCLE, 294); //292 294
GD.wr32(REG_VOFFSET, 12); //12
GD.wr32(REG_VSYNC0, 152); //152
GD.wr32(REG_VSYNC1, 10); //10
GD.wr32(REG_PCLK, 5); //5
GD.wr32(REG_SWIZZLE, 0); //0, 3 for GD2
GD.wr32(REG_PCLK_POL, 1); //1
GD.wr32(REG_CSPREAD, 1); //1
GD.wr32(REG_DITHER, 1); //1
//GD.wr(REG_ROTATE, 0);
GD.wr16(REG_TOUCH_CONFIG, 0x05D1);
}
}
w = GDTR.rd16(REG_HSIZE);
h = GDTR.rd16(REG_VSIZE);
model = 800;
//EVE_CHIP=FT800_model;
if (FT800_model != 0) model = 800 + (FT800_model - 6);
//loadptr = 0;
// Work-around issue with bitmap sizes not being reset
for (byte i = 0; i < 32; i++) {
BitmapHandle(i);
cI(0x28000000UL);
cI(0x29000000UL);
}
Clear(); swap();
Clear(); swap();
Clear(); swap();
if (FT800_model == 0x13)
{